资源列表
fpga_sw_led
- 本文件使用FPGA模拟拨码开关，当拨码开关置0或1时，led灯也对应点亮-This file uses the FPGA analog DIP switches, when the DIP switch is set to 0 or 1, led lights lit correspondence
fpga_counter_Verilog
- 此文件是基于xilinx ise平台上开发的计数器，产生可调的脉冲，也可进行分频。-This document is based on xilinx ise platform counter, adjustable pulse generation, but also for the division.
half_clk
- 用Verilog HDL语言实现的二分频，输出频率是输入频率的一半。-Using Verilog HDL language of the two frequency, output frequency is half the input frequency.
compare_8
- Verilog HDL机器语言中八位比较器的实现，两个八位输入，一个一位的输出。-Eight machine language Verilog HDL source code comparison, two eight-bit input and output a bit.
led_water
- FPGA 简单的LED流水灯 各种花样 适合新手学习 研究-FPGA simple LED flow light all kinds of tricks for beginners to learn
div_n
- 可以实现任意奇偶分频，简单实用二合一。直接调用-Can achieve arbitrary parity frequency, simple and practical in. Direct call
FPGA-ps2-lcd1602
- 基于FPGA的ps2解码lcd1602显示-PS2 decoding LCD1602 display based on FPGA
USB_Blaster
- FPGA下载工具的原理图，可以自己做，了解真正的下载-FPGA download development
abs_mode
- abs_mode 2-complement souce and testbench code
cla
- Carry Lookahead verilog source file
Piplined_RCA
- Pipelined Ripple Carry Adder verilog source file
qwe
- 基于quartus II verilog语言编程，实现有源蜂鸣器播放两只老虎 -Based on quartus ii verilog language programming, the realization of active buzzer playing two tigers