- urlshort 网址转发源码
- fire-fighting 简单的灭火机器人
- quyouxixianchengID 利用游戏进程id在易语言中提取游戏线程ID
- Calc 使用布尔变量
- qdeclarativenetworkaccessmanagerfactory The QDeclarativeNetworkAccessManagerFactory class provides a factory for QNetworkAccessManager for use by a Qt Declarative engine for Linux.
- vm spu hypervisor abstraction for Linux v2.13.6.
资源列表
RGB2YUV_TB
- 将RGB颜色空间转换为YUV颜色空间的testbench，用verilog写得，可以测试看看。-Convert RGB color space to YUV color space testbench, written in verilog, can test and see.
RGB2YUV
- 用verilog语言将RGB颜色空间转换为YUV颜色空间，可以使用的，大家可以试试，初学者可以帮助理解-Convert RGB to YUV with verilog language, can use, you can have a try, can help beginners to understand
herisong
- untuk fuzzy logic program
8_MIPI_to_HDMI_Terasic
- 基于altera公司MAX10型FPGA的mipi至hdmi通信的调试程序-Altera company based debugger type of FPGA MAX 10 spi to hdmi communication
6_USB_to_SDHC_Lab
- 基于altera公司MAX10型FPGA的usb至sdhc通信的调试程序-Altera company based debugger MAX 10 type of FPGA to sdhc usb communication
5_ADC_Lab
- 基于altera公司MAX10型FPGA的ADC调试程序-ADC-based debugger altera company MAX 10 type of FPGA
lvds
- lvds通信协议程序，已调通,并包含一些相关资料-lvds communication protocol procedures have been transferred through, and contains some relevant information
fpga
- FPGA代码，包含地址译码模块、16位锁存器、AD片选、死区及滤除窄脉冲、过流和短路保护、解除脉冲封锁模块、PWM模块、PWM选择 -FPGA code, including the address decoder module 16 latches, AD chip select, filter out the dead and narrow pulse, overcurrent and short circuit protection, lifting the blockade puls
VHDL-projects
- I have simple five VHDL projects. I use FPGA Spartan3A family board with XC3S50A FPGA chip. This project was created in Xilinx ISE Design Suite version (13.2).It contains divider,XOR blocks, counters, moore automat and more.
Parallel_SQRT
- 32-bit parallel integer square root
DA_TLC5620
- FPGA之TLC5620：将所给程序下载到实验箱，观察现象并结合现象理解程序的含义，使其实现单通道的DA转换：在按下通道的按键之后，用数码管显示输入的数字量，停止按键，数码管计数停止，继续按键则继续计数，按下复位键，则系统清零，数码管显示零值。此程序基于Quartus的编程环境，采用Veilog语言编写。-FPGA tlc5620: to the program downloaded to the box observed phenomenon and combined with the phe
AD0804
- FPGA之ADC0804实验（1）程序是用ADC0804显示00-ff（2）将其转换成0-255；（3）将其转换成0-5.0V； （4）如果输入电压大于2.5V，设定报警灯亮。此程序基于Quartus的编程环境，采用Veilog语言编写。-ADC0804 FPGA experiment (1) program is to use ADC0804 00-FF (2) will be converted into 0-255 (3) will be converted into 0-5.0V (