资源列表
nios_for
- nios 的基本配置，和一些例程，能够有效的学习基本的配置和语言环境-nios the basic configuration, and some routines can effectively learn basic configuration and locales
src
- verilog 通过串口控制VGA显示黑白机彩色棋盘 开发板是Xilinz RQ208-Color display in black and white machine control board through the serial port VGA Development Boards
15_tlc5620dac
- 利用状态机实现对tlc5620dac控制，实验时按key1,可选择DAC的通道，数码管1显示，按key2，key3可 输入8位数/模转换值，由数码管3，4显示，按key4，选择输出电压模式，由数码管8显示，0表示1倍，1表示2倍，按key5,将当前数据发送到DAC模块启动一次DA转换，这时可以万用表测量输出，也可以与理论值做下比较。-When using state machine to control the tlc5620dac, experiment by key1, choice o
demos2
- FPGA的代码verilog语言编写，包括LED流水灯，蜂鸣器，数码管显示。适合初学者，已经在板子调试成功，板子是 睿智IV开发板。-FPGA code verilog language, including LED water lights, buzzers, digital display. Suitable for beginners, it has been successful commissioning of the board, the board is wise IV devel
demoss
- FPGA的代码verilog语言编写，包括LED与按键验证，数据选择器，编码器，译码器半加器，全加器，适合初学者，已经在板子调试成功，板子是 睿智IV开发板。-FPGA code verilog language, including LED and key authentication, data selection, encoder, decoder and a half adder, full adder, suitable for beginners, it has been succe
ADC0809-
- ADC0809 AD转换器的VHDL程序实现-ADC0809 AD converter VHDL program realization
URAT-
- 异步串行通信接口UART的VHDL程序实现-Asynchronous serial communication interface UART VHDL program realization
stepmotor
- 步进电机定位控制系统的VHDL程序与仿真-Stepper motor positioning control system procedures and VHDL simulation
FPGA_verilog_uart-
- 基于 FPGA器件设计实现UART的波特率产生器、UART发送器和接收器及其整合电路,，利用Veriolog-HDL语言对这三个功能模块进行描述并加以整合，通过ModelSim仿真，用串口调试程序进行验证，最终实现一个通用异步收发器的设计。-UART baudrate generator, transmitter and receiver and its integrated circuit are implemented by FPGA device. Using Veriolog-HDL d
pci_lpc_card_7612_0910
- 基于PCI总线和LPC接口的POST主板诊断卡代码，已经通过fpga测试可以使用，性能非常稳定。-Based on the PCI bus and LPC POST motherboard diagnostic card code to interface fpga has passed the test can be used, the performance is very stable.
PCIe_CIVGX_AVST_On_Chip_Mem
- Altera公司的pcie核，附有调试用的驱动和上位机-pcie hard ip of altera, with driver and debug GUI
AD9640
- 这是用erilog语言编写的控制100M/150M高速AD9640的程序，适用于FPGA，亲测可用，供参考。-this is a program for FPGA to control AD9640, which is useful by verilog.