资源列表
code
- SHA_1算法填充部分的VHDL实现，让输入的数据可以转换为SHA_1算法所需要的512bit的数据-SHA_1 algorithm filling part of the VHDL realization, let the input data can be converted to SHA_1 algorithm need 512 bit data
DE1_D5M
- 摄像头底层程序，描述怎样在Altera DE0 Board平台上开发摄像功能-Camera underlying process, describe how Altera DE0 Board camera development platform features
bshift
- Barrel shifter VHDL code for Matlab
Sdram_Control_4Port
- DE2开发板提供的四端口SDRAM驱动，用户不需要对SDRAM直接操作，把SDRAM对用户透明化-DE2 development board provides four-port SDRAM drive, users do not need to direct the operation of the SDRAM, the SDRAM transparent to users
aaa
- 自动售货机vhdl程序，有波形仿真 quartus2-Vending machine vhdl procedures, simulation waveforms
sdram_design
- SDRAM存取控制器设计书，包含标准的SDRAM读写控制功能，和自动刷新功能。对VHDL设计初学者很有帮助。密码MMCTEAM。-SDRAM access controller design books, contain standard SDRAM read and write control functions, and auto refresh function. VHDL design helpful for beginners. Password MMCTEAM.
FPGA_Interface_verilog
- verilog数字接口实验程序，包括USB，矩阵键盘，蜂鸣器，串口，i2c总线接口程序实例。-verilog digital interface for experimental procedures, including the matrix keyboard, buzzer, serial, i2c bus interface program instance.
i2c-verilog
- 可进行i2c读写操作I2C is a two-wire, bi-directional serial bus that provides a simple and efficient method of data exchange between devices. It is most suitable-it can write and read codes in i2c.I2C is a two-wire, bi-directional serial bus that provides a
Verilog
- 一些用verilog编写的小程序，有全加器，计数器，比较器VGA显示，键盘扫描等-Some small programs written using verilog have full adder, counter, comparator VGA display, keyboard scanning, etc.
adc
- 用verilog实现TLC549——AD采集实验，采集完的数送给数码管显示-TLC549- AD Acquisition experimental collection finished with verilog number sent to the digital tube display
test_sdram
- 测试sdram程序,用来驱动sdram ip 核的程序-test sdram
32_bit_complex_multiplier
- 一款32位复数乘法器，用verilog写的。-32_bit complex multiplier,written in verilog HDL.