资源列表
usart_txd_mk3
- 使用Verilog写的串口发送程序，希望对大家有点用处-Using Verilog write serial transmission program, we hope to be of some use
Vending-Machine-using-Moore
- Vending Machine simulation using Moore sequence
Mealy
- Example of Mealy sequence in VHDL
Basic_Examples
- Basic syntax and codes used in VHDL
VHDL-Design-of-31-bit-Pipelined-Adder
- The design runs at 316.46 MHz and uses 125 LEs.
8-bit-Multiplier
- Multiplication is performed in three stages. After reset, the 8-bit operands are “loaded” and the product register is set to zero. In the second stage, s1, the actual serial-parallel multiplication takes place. In the third step, s2, the product is t
I2C
- 能够完整实现I2C，有详细的代码注释，非常容易理解。-Can fully realize the I2C, a detailed code notes, very easy to understand.
8-bit-Restoring-Divider
- Division is performed in four stages. After reset, the 8-bit numerator is “loaded” in the remainder register, the 6-bit denominator is loaded and aligned (by 2N− 1 for a N bit numerator), and the quotient register is set to zero. In the second a
Anderson--Algorithm
- We assume that denominator and numerator are normalized as, for instance, typical for floating-point mantissa values, to the interval 1 ≤ N, D < 2. This normalization step may require essential addition resources (leading-zero detection and two ba
Circular-CORDIC-in-Vectoring-Mode
- The first iteration rotates the vectors the second or third quadrant to the first or fourth, respectively. The shift sequence is 0,0,1, and 2. The rotation angle of the first four steps becomes: arctan(∞) = 90◦ , arctan(20) = 45◦ , arctan(2
arctan-Function-Approximation
- If we implement the arctan(x) using the embedded 9 × 9 bit multipliers we have to take into account that our values are in the range − 1 ≤ x < 1. We therefore use a fractional integer representation in a 1.8 format.
MAC
- 用verilog实现MAC控制器的各个模块详细代码-mac controller