资源列表
costable.zip
- cos_table主要应用在GPS接收机中，通过quartus9.1 的编程实现，控制接收的程序,cos_table main application in the GPS receiver, through the programming of the quartus9.1 implementation, control the received program
n-bit
- n bit parity generator is a versatile program that adds parity bits for any length of data the user enters . It accurately adds parity bits on the MSB and solves the problem during any kind of digital communication protocol
VHDL1
- 洗衣机的vhdl程序，包括正反转，各种档位的设置、以及开盖即停的设计。-Vhdl program for washing machines, including reversing, a variety of stalls set up, and the design of openings to stop.
iq_balance
- 调整iq幅度不平衡的模块，可以解决载漏和边带问题。-Iq amplitude imbalance adjustment module can be resolved carrier and sideband leakage problems.
screen-protect
- 基于VHDL语言编写的，通过下载到FPGA板子上，连接到电脑屏幕实现的屏幕保护程序，屏保中实现了多种运动方式，已包含按键防抖动功能。-VHDL language, downloaded to the FPGA board connected to the computer screen to achieve the screen saver, screensaver to achieve a variety of sports, contains the button shake functio
vga_640x460_spirte
- 使用Verilog语言编写的vga显示条纹的程序,可以在显示器上显示彩带,在Xilinx Spartan-6上运行通过,是很好的Verlog程序-Using Verilog language program vga display stripes, ribbons can be displayed on the monitor in the Xilinx Spartan-6 run through, is a very good program Verlog
multipliers
- 本人正在学习vhdl语言，买了套开发板，这些是配套光盘里的内容，非常难得，网上找不到的-I was learning VHDL language, bought a set of development boards, which are compatible CD-ROM's content, and very rare. not online! !
iCACHE
- 用VHDL写的数据cache，基于Verilog版本改编过来-To use VHDL to write the data cache, based on the Verilog version of the adaptation over
fp
- 经典的浮点运算VHDL源代码,是FPGA开发和VHDL学习的好资料!
pmd
- 一个跑马灯程序，加入了变速，变换方向，设定初始图形，以及分离为两个跑马灯的功能-A marquee program, adding a variable speed, change direction, set the initial graphics, and separated into two marquees functionality
sd_test
- sd 卡初始化，读写测试 xilinx spartan6 fpga-sd card initialization, read and write test xilinx spartan6 fpga
PRBS
- 代码是伪随机数生成和检测的模块，用于通信行业的FPGA编程。包括VHDL和Verilog两种语言的版本。用于做接口测试。-This module generates or check a PRBS pattern.