资源列表
zhuangtaiji
- 用状态机实现序列检测器的设计，并对其进行仿真和硬件测试。-With the sequence detector state machine design, and its simulation and hardware testing.
manchester_vhdl
- This design is targeted to the XCR3064XL-7VQ100C CoolRunner CPLD. This is a 3V, 64 macrocell device in a 100 VQFP package. The fitter was allowed to pick the pin-out for the device.
spectrum_system_back
- 完成对干涉数据光谱反演的一系列操作：FFT及相位对齐参数的计算。-Completion of the interference spectrum inversion of the data series of operations: FFT and phase alignment parameter calculations.
i2c_Verilog
- Verilog开发的I2c接口模块，如何需要更详细的资料，请参考www.opencores.org网站-Verilog development I2C interface module, how the need for more detailed information, please refer to website www.opencores.org
memtest
- FPGA NEEK環境專用程式.記憶體測試專用檔. -FPGA NEEK environment dedicated program. Dedicated memory test file.
Rs232_Vhdl_model
- RS_232 VHDL model for FPGA coded
pinluji.rar
- 四位十进制频率计设计 包含测频控制器（TESTCTL），4位锁存器(REG4B)，十进制计数器（CNT10）的原程序(vhd)，波形文件(wmf ),包装后的元件(bsf)。顶层原理图文件（Block1.bdf）和波形。 ,Four decimal frequency meter measuring frequency controller design includes (TESTCTL), 4 bit latch (REG4B), decimal counter (CNT10) of t
uart_receive
- 串口接收数据44个8bit数据，并且将4个8bit数拼接成32bit数，存进ram中， 可以通过 in system memory editro 查看-Serial port receive data 44 8bit data, and will be spliced into four 8bit number of 32bit number, deposit into the ram in, you can see in system memory editro
FPGA_VRILOG
- 一套基于XILIX,SPATAN2,XC2S200 芯片实验板上的,10个典型VRILOGHDL的FPGA实验,有帮助,
Dimmer
- Firmware for dimmer. Used triac and zero cross.
i2s_vmm
- inter IC Sound design with test bench written in Verification Methodology Manual.
new_rs_erasures
- 一种新的基于C的RS译码算法研究，供一起学习。-A new C-based RS decoding algorithm for learning together.