资源列表
vhdl-lvboqi
- 是用VHDL 写的一个滤波器程序，很实用，希望对需要的朋友有帮助-Is a filter program written in VHDL, very useful, hope to help a friend in need
seg7_disp
- Spartan xc3S400 FPGA 7-Segment VHDL Program
FPGA-chuankoutongxin
- 本文详细介绍了串行通用异步收发器设计原理及调试方法同时还介绍了QuartusII6.0软件的应用，此外还介绍了FPGA实现接口电路设计-This paper introduces the general asynchronous serial transceiver design principle and the debugging method is also introduced QuartusII6.0 software application, in addition, it also
PCMsignal
- VHDL编程的PCM码流时隙信号模块，完整地quartus工程文件，可直接运行。-PCM by VHDL
ModelSimSETutorialFromTainwan
- 来自台湾一个大学生写的modelsim se的教程，相当实用，中文。-A college student from Taiwan wrote modelsim se of course, very practical, Chinese.
Lock
- 密码锁，含按键操作和液晶显示程序，已测试通过的仿真程序，可参考-Lock, with key operation and LCD display program has been tested through the simulation program, refer to
VGA_CPLD
- 基于CPLD的VGA显示设计，利用quarter软件完成功能。-VGA display based on the CPLD design, the use of quarter software to complete the function.
VGA_move
- 基于FPGA的控制显示器程序。通过VHDL编程，下载到FPGA实验箱上。-FPGA-based process control monitor. Through the VHDL program, downloaded to test me on the FPGA.
Attachments_2012_06_28
- A2d converter in VLSI
bingzhuanchuan
- 串行转并行算法，自己编写，已经运行成功，算法简单易懂。-Serial to parallel algorithm
RGB0808
- RGB0808矩阵FPGA代码（Verilog HDL语言）-RGB0808 matrix FPGA code (Verilog HDL language)
07_uart_test
- uart通信协议的Verilog编码实现，以及完整的测试文件。(UART communication protocol Verilog encoding implementation, as well as a complete test file.)