资源列表
UCOS_II-transplant
- uCOS_II 在NiosII处理器上的移植过程以及全部源代码-uCOS_II NiosII processor in the transplant process and the full source code
halfanderandander
- 这是分别用vhdl和verilog语言编写的源程序，里边还附上了生成的电路器件图。
rs232
- 基于VERILog的RS232模块的程序，收发两个模块都有-The RS232 module based VERILog program, send and receive two modules have
dianzhenxin1
- 基于FPGA芯片设计点阵显示，具有汉字显示功能，由计数器，分频器，点阵显示模块等等组成-Based FPGA chip design dot matrix display with Chinese character display function, counter, divider, dot matrix display module, etc.
8B10B
- 基于VHDL的双校验位8B10B编码系统的设计，对于学习VHDL语言有一定的帮助-VHDL-based dual-parity bit 8B10B coding system for learning VHDL, there is some help
4_Low_Power_High_Performance_SRAM_Design_Using_VH
- Low Power High Performance SRAM Design Using VHDL By Mahendra Kumar, Kailash Chandra
step_moto
- 实现步进电机的细分驱动和不细分驱动及选择。正反转，工作使能控制，在开发板上测试过，工作良好-Stepper motor to achieve sub-drive and do not subdivided driving and choice. Positive inversion, work to enable control board in the development of tested, working good
wled
- verilog流水灯设计开发,已经经过验证的。-verilog water lamp design and development, has been proven.
mc8051_design
- MC8051 core , VHDL , Oregano Systems
Nexys3_EDK_GPIO_UART_AXI-14-4
- uart-usb 接口 edk nexys3 德致伦
08_uart
- 串口是现代嵌入式开发的常用通信方式，本例子通过vhdl实现串口通信 -Serial port is commonly used modern means of communication embedded development, the example of serial communication through the implementation vhdl
exp_r_alu
- 总线传输实验，包含下载到实验箱验证,数码管。二极管显示-Bus transfer experiments, contains downloaded to the validation of the test box, digital tube. Diode display