资源列表
hanming
- 产生m序列作为输入信号，能够实现(7,4)汉明码编码和译码功能。同时，还有加噪模块。 在QuartusII工作环境下使用-M sequence generated as the input signal, can be achieved (7,4) hamming code encoding and decoding functions. There are also additional noise modules. Working environments in the QuartusI
digtal_clock
- 基于FPGA的24时制数字电子钟，设置时间，实现整点报时和闹钟功能。-FPGA-based 24-hour digital clock, set time, bring the whole point timekeeping and alarm functions.
epcs35f
- 该程序实现了在ALTERA FPGA上搭建NIOS系统，实现程序在EPCS4上保存，在内部RAM 上运行-The program to build on in the ALTERA FPGA NIOS system, program EPCS4 saved on the internal RAM to run
8051core
- 基于FPGA的8051内核，不过不是最简的，需要自己删除些元件-8051 core based on FPGA
ATAIDE
- ATAIDE硬盘接口驱动程序，基于verilog的fpga实现-ATAIDE hard disk driver interface, based on verilog FPGA
songxiugai
- 乐曲演奏电路，能演奏歌曲，同时在数码管上显示演奏的乐曲音符的数字。-Music concert circuit, can play songs at the same time in the digital tube displays the number of notes played music.
clock
- VHDL编程数字钟，能够实现时间校正，闹钟，整点报时，显示日期，倒计时等功能。-The VHDL programming digital clock, time correction, alarm, hourly chime, such as date, countdown function.
mem_test
- ROM存储器的Verilog测试程序，希望对大家有帮助！-ROM memory of the Verilog test program, we want to help!
alu8bit
- it implement alu for 8 bit addition,subtraction,and ,or, left shift without overflow support and simulate it in modelsim
verilog_PLL
- verilog 写的硬件 pll 锁相环实现-verilog to pll
RAM
- FPGA简单程序，RAM可读可写存储器，容易读懂-FPGA simple program, RAM readable and writable memory, easy to read
ex1_601
- 该程序可产生周期脉冲，脉冲宽度及周期大小可通过改变相关数值调节。(The program can generate periodic pulse, pulse width and cycle size can be adjusted by changing the correlation value.)