资源列表
ml401_2_3_schematics
- xilinx ml401/ml402/ml403 开发板原理图-the schematics of xilinx ml401/ml402/ml403
liangzhu
- 用Verilog语言编写梁祝歌曲，用quartus编译文件-Butterfly Lovers with Verilog language songs, compiled files with quartus
Ex_acumulador
- Acumulador em VHDL (adder vhdl)
vga.rar
- 本例子实现了vga接口的描述的功能，使用的语言室verilog HDL,Vga achieved in this example the descr iption of the function interface, using verilog HDL language room
pldexp3_time
- PLD实验B组实验3，LCD1602动态显示时间，verilog语言-PLD experiment B group experiment 3, LCD1602 dynamic display time, verilog language
crc_accelerator
- CRC 的Nios的软核处理，系统采用Altera Nios IP核进行CRC算法，算法运行时间比常规CRC校检节省很多。-CRC' s Nios soft-core processing, the system uses Altera Nios IP core for CRC algorithm, algorithm running time than the conventional CRC checkout save a lot.
VAD_algorithm_and_FPGA_design
- 论文，关于VAD检测与FPGA如何实现的，基于短时能量-based on short energy ,VAD detected algorithm and FPGA design
simple_divider
- 自己写的一个除法器，网上多是同一个 繁杂难看明白 自己就写了个简单的 并且很容易看懂-Write a except time-multiplier, online is a multifarious ugly understand oneself write a simple and easy to understand
pll
- 由锁相环改变时钟，希望能帮助到大家，同时也希望大家多指教-Changed by the PLL clock, hoping to help to you, but I hope you teach more
s22_DCT
- 这是一个DCT变换的VERILOG代码，欢迎下载-This is a code of DCT transformation in verilog ,welcome to download!
I2C_EPM3128(v1.00)
- 本程序是使用 VHDL 语言开发的， 能够实现ALTERA CPLD-EPM3128A 通过I2C总线对EEPROM的读写。-This program is developed using VHDL language can of ALTERA CPLD-EPM3128A through the I2C bus EEPROM read and write.
Viterbi_check
- It is a verilog code for viterbi decoding with trellis diagram