资源列表
dds
- 利用altera的cyclone FPGA芯片，模拟DDS原理，产生频率可调的正弦波，并使用自带的逻辑分析仪仿真成功-The use altera cyclone FPGA chip, analog DDS principle, have adjustable frequency sine wave, and use the built-in logic analyzer simulation success
newdds
- 基于FPGA的DDS算法的实现，已经通过FPGA的后端仿真实现-FPGA-based algorithm cordic, has passed the back-end FPGA simulation
VHDL
- 这是学习VHDL语言很好的电子书，对VHDL语言的编程规则作了很详尽的讲解，源码例子解释也相当详细-This is a very good learning VHDL language e-books, on the rules of VHDL programming language had a very comprehensive presentation, source code is also a fairly detailed explanation of examples
jishuqiyuchufaqi
- 一个关于触发器与计数器的fpga源程序，经调试可用 -a fpga project
A7105-Datasheet-v1.1
- 无线A7105说明书 0.0 Initial issue. 0.1 Modified specification and add section for TX power setting 0.2 Add top marking info., reflow profile, Carry tape & reel dimensi 0.3 Modify descr iption of state machine and FIFO mode Rename IRQS1/
ztj
- 底层基本逻辑单元实现状态机的功能，根据不同的控制位实现状态转化(Basic logic unit realizes state machine function and realizes state transformation according to different control bits)
key_sin
- PS/2键盘加DDS的verilog 设计-PS/2 keyboard plus the verilog design DDS
hitm.rar
- 数字系统答辩PPT,打地鼠课程设计，获得了二等奖的哦！,Digital System reply PPT, play hamster curriculum design, won the second prize of Oh!
ssram
- ssram using VHDL code
fpu100_latest.tar
- This a 32-bit floating point unit (FPU), which I developed in a project within the Vienna University of Technology. It can do arithmetic operations on floating point numbers. The FPU complies fully with the IEEE 754 Standard-This is a 32-bit floating
Calculator
- 基于Verilog开发的计算器，希望对大家有帮助！-Verilog-based development of the calculator, we want to help!
Creating-Safe-State-Machines
- Creating Safe State Machines