资源列表
并口的CPLD烧录线，通过跳线支持三大厂家的CPLD/FPGA(Altera,Xilinx,Lattice)
- 并口的CPLD烧录线，通过跳线支持三大厂家(Altera,Xilinx,Lattice)的CPLD/FPGA烧录,附有电路图与Verilog HDL文档.使用的芯片为XC9572XL-VQ64
SDRAM_CONTROLlER_Modelsim
- SDRAM控制器，Verilog代码编写，让你快速了解SDRAM的读写时序。包含Modelsim仿真工程和文档-SDRAM controller, Verilog coding, allows you to quickly understand the SDRAM read and write timing. Modelsim simulation engineering and contains study notes
sram_fifo_uart
- 用verilog HDL编写的SRAM+FIFO+UART模块，欢迎各位指点 -Welcome to the guidance written in verilog HDL SRAM+FIFO+UART module
LCD1602_ysd
- LCD1602程序代码，经过开发板验证，正确，采用Verilog语言编写-LCD1602 program code, through the development board validation, correct use of Verilog language
CPLD
- 用vga显示俄罗斯方块基于fpga但是不是真正的游戏俄罗斯方块-Tetris with vga display based on the fpga, but not a true game Tetris
VmodCAM-0.0
- 从VMOD设想头中读入视频流数据，将其存在ddr2中，并且通过Hdmi线显示出来-Read into the video stream data from the VMOD envisaged head, exist ddr2, and the the Hdmi line displayed
sdram_ex9
- 深入浅出玩转FPGA代码 实验9sdram模块 基于EP1C3-Layman Fun FPGA code module based on experimental 9sdram EP1C3
sdr_test
- sdram读写测试程序，带modsim仿真文件-verilog code of reading and writing of sdram, with modsim simulation test file.
fbgabook
- new book for learning fpga
CP_ADDER
- 利用ISE开发环境实现802.11a物理层OFDM系统中加入循环前缀的模块。-ISE development environment to achieve 802.11a physical layer OFDM system module of the cyclic prefix.
quartusIIexperimentguide
- QuartusII实验指导书FPGA设计初级班培训实验指导手册_V1..0pdf.pdfFPGA设计提高班培训实验指导手册_V1.0.pdf-QuartusII experimental instructions FPGA design training beginners guide _V1 .. 0pdf.pdfFPGA experimental design experiments to improve the training courses guide _V1.0.pdf
fpga
- FPGA 的教程 ,适合初学者，望有点启发-fpga