资源列表
pinlvji.vhd
- 频率计vhdl程序
目前以太网PHY芯片是通过总线MDC/MDIO
- 目前以太网PHY芯片是通过总线MDC/MDIO，但是基本上是通过MAC芯片直接管理的，本代码实现了通过FPGA管理PHY。即由FPGA完成MII管理,At present, Ethernet PHY chip through the bus MDC/MDIO, but basically through the direct management of MAC chip, the code through the FPGA implementation management PHY. FPGA
vhdl
- FPGA分频32.768KHZ晶振用VHDL语言如何分频成1HZ的时钟信号-fenpin
15_pwm
- 黑金开发板配套程序15，PWM的使用，与大家分享。-Black gold development board supporting program 15, PWM used to share with you.
dividefrequency
- 如何用VHDL语言对时钟进行分频以达到计数目的-how to achive counting by VHDL Language
any-timer
- 有24/60进制的计时功能，又扩展到可以设计成任意进制计时器，简单实用-A 24/60 hex timing function, but also extended to the timer can be designed into any band, simple and practical
calculator
- 多功能计算器：通过键盘输入，可实现两位数的加减运算，带有进位，借位。-Multi-function calculator: The keyboard can be achieved double-digit addition and subtraction with carry, borrow.
Booth_Multiplier
- 布斯乘法器的VHDL程序,下載後直接解壓縮複製貼上到你的EDATOOL就可以.-Booth multiplier VHDL procedures downloaded directly extract copy affixed to the EDATOOL you can.
new-piso
- its hdl code and test bench for paralell in serial out design...written in verilog and by haneesh
music
- Music demo verilog file
jiyuVHDLyuyandehanshuxinghaofashengqi
- 好用的函数信号发生器，能产生多种波形，例如，正弦波，方波，锯齿波，阶梯波。-Useful function signal generator, can produce a variety of waveforms, for example, sine wave, square wave, sawtooth, wave ladder.
led.control
- Control led with clock