资源列表
Vga
- VHDL code to digitally control the interface with a VGA display. Code is technologically independent and can be prototyped in any programmable device or ASIC.
eeprom
- EEPROM模块源代码，希望对大家有用，方便交流-EEPROM model
speaker_divider
- FPGA上蜂鸣器的驱动及测试程序,Verilog HDL语言-The divider and test program of the speaker on FPGA, in Verilog HDL language.
Matryce
- Few eeprom dumps od laptop LCD sceens.
LCDNTROL
- verilog/vhdl LCD水灯程序-Spartan3E开发板调试通过-verilog/vhdl LCD light program-Spartan3E water development board debugging
ADC_TLC549_FPGA
- 用FPGA控制AD转换芯片tlc549实现AD转换-FPGA control AD conversion
4BCDcodeaddition
- 用verilog实现两个4位BCD码数字的十进制加法计算-4 bit BCD coded decimal addition calculations
altera.rar
- 在调试nios ii时，由于软件或者是环境的改变造成原先建好的工程不能正常使用，提供一点解释希望能有所帮助,when debugging Nios ii, or because of software changes in the environment are caused by the original construction of the project should not normally use, to provide a little hope to be helpful to
VHDLcode_gate
- different gate implementations
PCI-T32
- PCI.VHD, THE INTERFACE MODULE WITH PCI AGENT CHIP --v1.0: For CY7C9689, First Version working on L01A chip --V2.0: For simplified PCI Agent, Xilinx and AMD chips
kursor
- Obsł uga kursora w ję zyku polskim. Zaż ół ć gę ś lą jaź ń.-Obsł uga kursora w ję zyku polskim. Zaż ół ć gę ś lą jaź ń.
asyncfifo
- 异步fifo，使用双端口RAM作为memory-asynchronous fifo