资源列表
DigitalVvoltmeter
- 用ise工具实现数字电压表的功能，编程语言为vhdl-ise Digital voltmeter vhdl
seg7
- SEG7数码管显示示例程序，适用于ALTERA的CPLD-SEG7 digital display sample program of ALTERA CPLD
lcd
- implementation of 16x2 lcd module driver in vhdl with the scroll a read facility.also a memory device is been also added.for 576 charecter in spartan 3 device tested.
ahb_slave_ssrw
- 通过AHB总线简单访问register/RAM 的verilog 子模块 ssrw stands for simple single read write.- submodule used for simple configuration register/RAM accesses ssrw stands for simple single read write.
key
- 用硬件描述语言VerilogHDL完成Basys2键盘扫描设计模块。-Using hardware descr iption language Basys2 to complete the VerilogHDL keyboard scan design module.
prog
- A simple program for logic gates using KCPSM3 in Spartan 3E Starter kit
VERILOG DDS 正弦输出
- Verilog 编写
VCO_WITH_PLL
- Voltage controlled oscillator with p-Voltage controlled oscillator with pll
lcd_ctrl
- 程序是用VHDL语言在quartus开发环境中实现的led显示的源代码-VHDL language program is a development environment in quartus implemented led display source code
fft_16
- 16点的fft程序，入口参数为（输入数据，输出数据）-16 points of the fft program, the entrance parameters (input data, output data)
lcd_12864_dirive
- HS12864的驱动，verilog语言编写，，，，，希望有用-HS12864 drive, verilog language,,,,, I hope useful
spatiotemporal_computing_core
- 用VHDL实现时空混沌：耦合映像格子(CML)-The spatiotemporal chaos of coupled tent map lattice implemented by VHDL.