资源列表
RT_Ethernet
- 实时以太网MAC层协议控制器。注：100M全双工-Real-time Ethernet MAC layer protocol controller. Note: 100M full duplex
asyn_fifo_bk
- 该verilog代码位手动编写的异步fifo。-This code is manually generated asychronous fifo.
S6_VGA
- 利用cpld作为控制器实现驱动vga显示器，虽然只有8位色，但是实现方式只得借鉴-cpld verilog vga
sdram-uclinux
- 使用最新的系统搭建工具Qsys构建了包括sdram的nios2系统，编写了程序，并在de2上实现。-This file is used to drive the sdram for qsys users.
hello
- FPGA最基础实验程序，编程实现向计算机发送“HELLO”字符串-FPGA most basic experimental procedures, programming sending " HELLO" string to the computer
cube_root
- cube_root使用Verilog语言使用开立方根的算法-cube root
AD-and-DA-in-DSPPFPGA
- 上海志宇DSP+FPGA开发板AD/DA回放程序-AD/DA in DSP+FPGA
DEMO_V
- 黑金FPGA开发板的DEMO 程序，适合初学者入门级， quartus12.0下面编译通过-The black gold FPGA development board DEMO program
rx_tx
- 上位机与FPGA进行RS232通信，FPGA可以发送与接收。-Host computer and the FPGA RS232 communication, the FPGA can send and receive.
ESSC2
- FPGA控制CPU的上电过程,实现CPU的准确上电控制。-FPGA controlles the process of POWER-ON for CPU
arm6410裸机代码
- 串口，LCD，各种三星6410的裸机程序代码，(uart lcd s3c6410 uart lcd s3c6410)
spacewire_src
- opencores上的关于spacewire的初级源码，已经通过板上实验，但是工程应用有待完善，可以作为设计人员的设计参考-opencores on spacewire on the primary source, the board has passed the test, but the engineering applications need to be improved, can be used as design The design reference staff