资源列表
FPGAsixaong2
- FPGA重要设计思想及工程应用之时序及同步设计-FPGA the important design thinking and engineering applications of timing and synchronization design
exp8
- 浙江大学体系结构实验课代码 实现5级流水线带有停顿，旁路和控制竞争的处理。-Experimental Architecture, Zhejiang University course code with a pause 5-stage pipeline, bypassing the treatment and control of competition.
01_run_led
- verilog软件实现PLL，对系统时钟进行分频(Verilog software implements PLL, frequency division of system clock)
1
- 基于matlab和QuartusII开发的无线通信FPGA设计,内有(matlab代码,Verilog代码,缩略语表.doc)注释详细,代码数十个,总有一个是你喜欢的!-Matlab and QuartusII based on the development of wireless communications FPGA design, there are (matlab code, Verilog code abbreviations. Doc) Notes detail dozens of
arm7
- ARM7core verilog 源代码-ARM7 core verilog source code
LCD1602
- LCD1602液晶 用VHDL语言写的显示字符串-LCD1602 LCD with VHDL language to write the display string
cpu
- 用system verilog写的一个arm处理器原代码。-Write an ARM processor system verilog source code.
adv7123测试程序-vhdl
- 基于adv7123芯片的彩条测试程序，vhdl语言编写，下载即用。(Color test program based on adv7123 chip)
TEST-CPU-2
- 基于VHDL语言的微指令控制的CPU，16位地址线-VHDL language based on the microinstruction control of the CPU, 16-bit address lines
run_led
- 黑金FPGA开发板配套跑马灯例程，希望和相关朋友分享-Black Gold Marquee FPGA development board supporting routines, and hope to share relevant friends
ps2_lcd
- 此代码能够使得键盘控制液晶，实时的进行书写，按下Backspace清屏-This code enables the keyboard to control the LCD, in real-time writing, press Backspace clear the screen
Verilog_testbench
- 介绍在FPGA广泛使用的Verilog语言以及如何编写高效的testbench，让仿真更加接近实际模型。-Introduction widely used in FPGA Verilog language and how to write effective testbench, so that a more realistic simulation model.