资源列表
LCD1602_UART
- kc705上的1602显示模块的verilog源码，以及UART源码，附带一些设计过程资料(kc705 1602 display module source code,and UART source code.addition to some design progress document.)
SP605_V4_beifen_V2_success
- 基于FPGA内核microblaze的开发，使用的开发板是SP605，采用双备份冗余设计，实现了开发板上灯的控制。-Based on FPGA kernel MicroBlaze development, using the development board is SP605, the use of dual redundancy design, to achieve the development of the board on the light control.
mig_7series_v1_9
- DDR3控制器源码，针对XilinxFPGA的DDR3控制器的源码，已经验证通过。-DDR3 Controller，complete DDR3 controll，have pass verificaion.
led_test
- 最简单的nios例程，无需修改，下载到目标板直接应用-The simplest routines Nios is no need to change, download the application directly to the target board-The simplest routines Nios is no need to change, download the application directly to the target board
Verilog.HDL.Experiment
- Verilog.HDL.Experiment.例程-Verilog.HDL.Experiment. Routine
AD7760_TEST
- AD7760模数转换，使能滤波器功能，简单易懂，可进行各种配置 全功能支持，并附加使用说明(AD7760 Full Function Support with Additional Instructions)
Digital-Circuits--5Ed(Yanshi)
- 数字电子技术基础，第五版，阎石著，带习题答案-Digital Circuit，5th Edition
Wavemaster_RS232
- 基于FPGA实现RS232传输，代码有注释，共四个模块，方便实用(RS232 transmission based on FPGA,)
verilog
- 用fpga制作一个音乐播放器，此为浙江大学信电系fpga教程大实验成果。-Use fpga make a music player, this is the letter Electrical Zhejiang University fpga tutorial big experiment results.
one_1bit
- 利用xilinx公司开发的vivado平台，实现调用1bitpwm信号实现下变频的功能(Using the vivado platform developed by Xilinx, we can realize the function of calling down the 1bitpwm signal to realize the down conversion.)
FPGA-and-SOPC
- quartusII中有个sopcbulider工具，此教程很好的介绍了在DE2-70板上如何使用sopcbulider和NIOSII.-It have sopcbulider tool quartusII this tutorial a good introduction to how to use sopcbulider and NIOSII- based on the DE2-70 board.
22
- 《数字滤波器的MATLAB与FPGA实现：Altera Verilog版》——杜勇六到九章pdf(Realization of digital filter with MATLAB and FPGA: Altera Verilog version)