资源列表
FPGA_SSI
- 文档中的verilog代码实现了FPGA与SSI总线的数据协议链接-Verilog code in the document of the FPGA data bus protocol and SSI links
seven_lcd
- 七段数码管显示的时钟程序VHDL代码 ISE编译环境-SEVEN seg VHDL ISE CLOCK
dongnandaxuejiangyi
- 东南大学课程学习讲义 供大家参考学习 比较经典的讲义-Southeast University lecture courses for your reference to learn more classic lectures
Minor-1
- code for "booth multiplier" using verilog
happy new year
- 利用硬件板子上的蜂鸣器实现的新年快乐的歌曲(Using the buzzer on the hardware board to achieve a happy New Year's song.)
Verilog
- 东南大学语言讲义，希望对你有帮助 很好的资料-Southeast University, language notes, I hope you have good information to help
JPEG2000MQ
- 这是实现JPEG2000MQ编码其的文件，需要的下载-This is achieved JPEG2000MQ encoding the file, you need to download
exercise_2.1
- labview programming FPGa spartan 3E
modelsim
- 详细介绍modelsim的使用方法，详细的介绍modelsim使用方法
pinlvji
- 这是一个简易数字频率计的源代码文件，基于DE-2 70，50MHz分频，四位十进制显示-This is a simple digital frequency meter source code files, based on DE-2 70,50 MHz sub-band, four decimal
Verilog
- 东南大学 Verilog讲义 适合初学者使用-Southeast University, Verilog notes for beginners