资源列表
LIP2131CORE_dram_controller
- LIP2131 CORE Verilog DRAM Controller
18b20display
- 中级篇04：18b20温度计，显示在数码管上适合新手简单学习，内含原理介绍等文件，吐血推荐-Intermediate chapter 04:18 b20 thermometer on the digital display is simple for novices to learn, including the principle of introduction and other documents, recommended blood
xilinx_edk_9.2_crack
- xilinx edk 9.2 破解器/注册机-xilinx edk 9.2 crack
pipelined_computer
- 基于de2-board的汇编以及verilog的五段流水线CPU代码，适合新手学习-Based on the de2-board assembler, and the five-stage pipelined CPU verilog code, suitable for novice learning
18b20_code
- 利用DS18b20温度传感器设计的温度计，温度值在数码管上显示。包括源代码，modelsim仿真与DS18B20相关PDF资料-Temperature sensor design use DS18b20 thermometer, the temperature value is displayed on the digital control. Including source code, modelsim simulation and DS18B20 information related t
60s qiangdaqi
- 1.抢答器同时供N名选手，(此处假设4个)分别用4个按钮S0～?S3表示。? 2.设置一个系统“开始复位”开关S，该开关由主持人控制（当主持人按下该开关后以前的状态复位并且开始计时抢答）。?3．抢答器具有锁存与显示功能。即选手按动按钮，锁存相应的编号，并在LED数码管上显示，同时扬声器发出报警声响提示。选手抢答实行优先锁存，优先抢答选手的编号一直保持到主持人将系统清除为止。?(1. Responder at the same time for N players, (here assumed
temperature
- 用Verilog语言编写的基于FPGA实现的温度检测装置，检测精度为小数点后六位。-A temperature sensing device based on FPGA using Verilog language, the detection accuracy of six decimal places.
IP
- ALTERAL的stratix4的IP核的使用讲解PPT，便于理解Stratix的IP核调用-The IP core stratix4 ALTERAL the use to explain the PPT, to facilitate the understanding the Stratix of IP core call
CPLD_FPGA
- 卡内基梅陇大学课程讲卡内基梅陇大学课程讲义-Carnegie Mellon University, Carnegie Mellon University about verilog verilog course lecture notes
sc_computer_student
- 单周期CPU,需要一定代码的添加，DE2板，altera工程环境-Single-cycle CPU, need to add some code, DE2 board, altera engineering environment
YDT1522[1].1-2006
- 中国信息产业部发布的SIP协议,正式版本.
AD9262
- AD9262 用Verilog代码完成对AD9262的控制-AD9262 complete control of the AD9262 Verilog code