资源列表
MatchFilter
- VHDL语言实现8路并行输入，8路并行输出，直接序列扩频接收机的高速匹配滤波。 -VHDL language to achieve 8-channel parallel input, 8-channel parallel output, high-speed direct-sequence spread spectrum matched filter receiver.
26_sdram_ov5640_vga_gray
- 完成图像的实时采集与vga显示功能，摄像头为ov7670系列，开发板为黑金AX01系列(Complete the real-time image acquisition and VGA display function, the camera for the ov7670 series, the development board for the black gold AX01 series)
usb
- altera FPGA NIOS架构，实现USB的读写操作-altera FPGA NIOS
test11
- 在altera de1的板子上安装fat12fat16fat32文件系统，已经测试成功，直接能用
Frame_Detection
- OFDM系统的帧检测模块，根据802.11a标准，利用前导的相关性进行的设计，综合仿真及在线调试已通过。-Ofdm frame detection module is very important and verilog difficult to realize in OFDM system.
clock_1Hz
- Clock 1Hz with duty cycle control for verilog for DE2-115 Altera FPGA
桥梁模拟
- 桥梁模拟桥梁模拟桥梁模拟桥梁模拟桥梁模拟桥梁模拟桥梁模拟桥梁模拟
Quartus Prime Introduction
- 一份微软官方的全英文quartus prime入门教程文档。(An official Microsoft English quartus prime tutorial document.)
lm75_rd
- 基于IIC总线的简单的温度传感器LM75A_RD程序-IIC bus-based simple temperature sensor LM75A_RD program
Deep-understanding-of-FPGA--design
- 深入理解Altera FPGA应用设计-Deep understanding of FPGA Altera application design
SATA3.0
- SATA3.0协议详细说明，PS：全英文介绍！-SATA3.0 Procotol
sp601_BIST_rdf0045_12.4_c
- Xilinx开发板sp601的开发实例，适用于初学者-Xilinx development board sp601 development example for beginners