资源列表
ADPLL.rar
- 全数字锁相环（adpll)的部分源程序代码，是其中最重要的部分。,All-digital phase-locked loop (adpll) part of the source code, is one of the most important part.
uart
- 用FPGA实现uart的verilog源码，包含standard framing error, parity control and overrun detection.-The UART design was designed from a standard uart function with a read/write microprocessor interface. It includes standard framing error, parity control and ove
LED_FINAL2
- 用Verilog HDL 实现16*32LED点阵的静态显示-Using Verilog HDL to achieve 16* 32LED lattice static display
topclock
- 基于FPGA的数字钟设计，带有正点报时任意时刻闹钟-Design of FPGA-based digital clock, alarm clock with a punctual timekeeping at any time
uart2
- 这是一个串口源码，对单片机开发者有用，单片机开发者想用-This is a serial code, useful to developers of microcontroller
serial-multiplier-using-generic-components
- Serial multiplier using generic components
ALU
- verilog编写，八位ALU，加减与或比较-verilog prepared eight ALU, subtract, or compare with
LEDWATER
- 跑马灯/流水灯代码，实现左右移和幂布式流水四种模式的循环变换，并包含testbench文件。-Marquee/water lamp code, move around to achieve the water and power distributed four modes of loop transformations, and includes testbench files.
LCD
- DE2板上的LCD显示器驱动程序和相应的测试程序,verilog语言写的。-DE2 LCD display driver board and the corresponding test procedures, verilog language to write.
dds_key_bak
- DDS控制部分 数码管显示，可选择多种波形，频率可控-DDS control part of digital tube display, choose a variety of waveforms, frequency controlled
PICC Modified-Miller Decoder
- Support 106/212/424/848kbps, modified miller code decoder. Si verified.
piccdecetuclk
- PICC ISO14443A decoder