资源列表
PERI4-DM9000A
- 基于FPGA的DM9000A芯片的网络数据采集系统，基于NIOS架构，c语言编程，资料齐全，包含不止5个源程序，绝对受用！-FPGA-based the DM9000A chip network data acquisition system based on NIOS architecture, c programming language, the information is complete, contains more than 5 source code is absolutely
DE2_Default
- DE2的默认例程：当电路板供电的，这样的设计是最初的设计。递增计数器显示值 7段显示器和发光二极管。也显示图像的VGA端口上。-This design is the initial design when the board is powered-up. It increments a counter and displays the value on the 7-segment displays and LEDs. An image is also displayed on the V
PID-CPLD
- 文章描述是关于智能PID的CPLD实现形式，内容详实，极具参考价值-The article describes the CPLD on Intelligent PID forms of informative, has great reference value
uart_verilog
- 串口标准通讯，带奇偶校验和通讯超时故障，带测试文件-The serial standard communication with test files
DE2_NIOS_HOST_MOUSE_VGA
- 该设计使用了Nios II系统来演示如何在DE2开发板上的USB主机端口连接到一个USB设备进行通信。本设计实现了一个单色显示屏，预加载的图像，用户可以利用它与鼠标。应连接到VGA端口，一个USB鼠标连接到USB主机端口和一个CRT/ LCD显示器。-This designs uses a Nios II system to demonstrate how to communicate with a USB device connected to the USB HOST port on the
uart_tx_and_rx
- A verilog code for UART transmitter and receiver system-A verilog code for UART transmitter and receiver system...
labview
- FSFSFSFSFSF GDGDGLABVIEW可以看看
study
- 在PicoBlaze上实现VGA显示、LED移位、交通灯状态变化等功能-VGA display, LED shift state of the traffic lights on in the PicoBlaze changes
anjian
- 1）实现最大输入两位十进制数字的四则运算（加减乘除） 2）能够实现多次连算（无优先级，从左到右计算结果） -1) maximum input two decimal digits four operations (addition, subtraction, multiplication and division), 2) be able to achieve many even count (no priority, from left to right results)
shumaguan2
- 七段数码管 VHDL 电子钟 简单的 加油-i don t know how to fanyi
Deco7seg
- uso de display en lenguaje VHDL
four-adder-design
- 可编程逻辑设计-用VHDL语言进行四位加法器的设计-Programmable logic design _ four adder design