资源列表
reveal
- 自动检测 示波器 的 输入频率 信号 的 VHDL 的 源代码-Automatically detect the input frequency signal oscilloscope VHDL source code
cpu
- 16位的CPU的VHDL程序~~还有附加的生成波形，可以应用于课程设计中-16-bit CPU, VHDL ~ ~ There are additional procedures for generating waveforms, can be applied to curriculum design
taxi
- 基于FPGA的出租车计费器 所要设计的出租车计价器，要求能够显示里程数和乘客应付的费用，其中里程数精确到0．1km，乘客应付的费用精确到O．1元，显示必须以十进制的形式来进行。出租车的计费标准为：起步价6元，里程在3 km以内均为起步价；里程在3～7 km之间时，每行驶1 km增加1．6元；超过7 km时，每行驶1 km增加2．4元。-FPGA-based taxi meter by meter taxi to design, requires the ability to show mi
caideng
- 16盏彩灯循环 分4个节拍，按一定顺序依次循环执行-16 Lantern 4 beat loop points, according to a certain order of loop
biaojueqi
- 七人表决器 当同意人数大于等于4时，投票通过。-Seven voting machines when the agreed number of greater than or equal 4, vote.
qicheweideng
- 汽车尾灯控制电路 左右各3个指示灯。向一侧转弯时，指示灯循环点亮。刹车时，指示灯全亮-Car tail lights control circuit around the three indicators. Turn to the side, the indicator light cycle. Brakes, lights all light
VGA
- 本程序是实现VGA的显示，里面附带有说明，用户下载后可以看到。-This procedure is to achieve VGA display, which comes with instructions, the user can see the download.
sw-led
- 用一个开关SW来控制一个灯的开与关，程序简单，可以用来熟悉开发过程。-SW with a switch to control the opening and off a light, simple procedures can be used to familiar with the development process.
rtl
- 这是一个在FPGA开发板上已经测试通过的程序，是关于跑马灯的程序，对初学者很有用。-This is an FPGA development board has been tested through the process, is on the marquees of the program, useful for beginners.
rs232
- 本设计是PC和FPGA的串口通信的程序，用的是VERILOG语言，调试成功，用户可根据自己的项目稍作改动。-The design is a PC and the FPGA' s serial communication procedures, using a VERILOG language, debugged, the user can make a little change according to their own projects.
UART_vhdl
- 非常经典的VHDL编写的UART软件核，支持8位/16位通信-UART S-Communication
Some_classic_examples_of_VHDL_language_source_code
- ＶＨＤＬ语言的一些经典实例源代码，包括状态机，时序电路，组合逻辑电路等-Some classic examples of VHDL language source code, including the state machine, sequential circuits, combinational logic circuits