资源列表
LCD
- 用VHDL写的一个显示程序，希望能帮上大家的忙，嘿嘿。-Written in VHDL, a display procedure, hoping that would help everyone a favor on the Hei hei.
44keyboard
- 刚写的一个44键盘程序，调了好多天才调出来，给大家提供参考。-Just write a 44 keyboard program, tune out of tune a lot of talent to give you a reference.
clock
- verilog program for real time clock.. select the .v file to view the code.
multiplier
- verilog program for 8-bit multiplier
delay
- 一个可以把信号拉长任意个CLk的VHDL源码例子。详见说明文档-A signal can be stretched any one CLk the VHDL source code examples. See documentation
ds18b20-vhdl
- vhdl写的ds18b20程序，相互交流-vhdl written ds18b20 procedures, mutual exchange
IPcore
- 非常有用的IP核资源，里面包含了JTAG,MEMORY,PCI，SDRAM和USB1.1等内容，期望对大家有用-A very useful IP core resources, which includes the JTAG, MEMORY, PCI, SDRAM, and USB1.1 and other content, expectations for all of us
11FIRfliter
- 11阶FIR滤波器和（7，4）编码器的Verilog语言，高手的作品，放心下-11-order FIR filter, and (7,4) encoder of the Verilog language, master' s works, rest assured that the next
sell
- 自动贩卖饮料机的Verilog语言，高手的作品，放心下-Beverage vending machines Verilog language, master' s works, rest assured that the next
CRCecoder
- CRC 编码的Verilog语言，高手的作品，放心下-CRC-coded Verilog language, master' s works, rest assured that the next
jtag
- Fpga开发应用，jtag方面的源代码，VHDL-Fpga development and application, jtag in the source code, VHDL
bit_synchronize
- 位同步例程源代码,FPGA应用领域，Verilog-Bit synchronization routines source code, FPGA applications, Verilog