资源列表
syn-fifo-verilog
- 用verilog语言写的同步FIFO设计源代码。-The source codes for syn-fifo using verilog language.
CHICAGO5Manual
- 高科技的发展使芯片设计不再是半导体工业的领域，现场可编程逻辑阵列（FPGA）的出现使通过软件来快速实现芯片设计成为可能。本系统是广泛面向全球的工程技术人员和大专院校学生，使您能够在最短的时间内掌握FPGA的应用与VHDL/AHDL/Verilog HDL这一电子逻辑设计利器，迅速的加入高级电子设计人才行列。-The development of high-tech chip design is no longer the field of semiconductor industry, fiel
1
- FPGA实验教学 FPGA实验教学板的一些调试程序可供参考。-Experimental Teaching Experiment Teaching FPGA board FPGA of some debugger for reference.
matlab
- 16位浮点FFT算法的VHDL实现有测试文件！-16-bit floating-point FFT algorithm VHDL realization of a test file!
KeyBoard_ysd
- quartusII的环境下的基于Ep3C10144的KeyBoard程序-quartesII of the environment based on the KeyBoard program Ep3C10144
dpRam1
- Dual port ram design project developed in Xilinx using VHDL
RISC-DSP
- RISC-DSP组合处理器设计优化[1].-RISC-DSP processor design portfolio optimization [1].
Verilog_for_Digital_Design_and_Synthesis
- useful VHDL document for programmer
Design_Through_Verilog_HDL
- VHDL tutorial for beginning learner
VHDLTutorial
- VHDL tutorial for self studying
BPQ
- 倍频器-WE
de2_clock
- de2_clock on altera de2 board