资源列表
100VHDL
- 100个VHDL的例子-100 examples of VHDL
a
- ASIC Design using VHDL by Shyam Mani
computer7
- 一款8位Turbo-51的CPU软核的设计-An 8 Turbo-51' s soft-core CPU design ....
computer6
- 8位CPU软核设计与应用研究-8-bit CPU design and application of soft-core research .......
dds
- 一个可用的很不错的DDS 频率合成程序，用VHDL语言编写-Available is a good DDS frequency synthesis procedures, using VHDL language
ISE7.1i_course
- ISE7.1i 中文教程 适合xilinx的FPGA/CPLD用户-Chinese ISE7.1i the xilinx tutorial for FPGA/CPLD users
computer5
- 一种RISC结构8位微控制器的设计与实现-The structure of a RISC micro-controller' s 8 Design and Implementation
computer4
- 基于FPGA的CPU核及其虚拟平台的设计与实现-FPGA-based CPU core and its virtual platform design and implementation of
wangjinming
- 王金明的一些学习VHDL的子-Wang Jinming study of some subset of VHDL
w
- 用VHDL语言设计四位全加器，有低位进位和高位进位。-VHDL language with four full-adder design, there are low and the high binary binary.
multi8x8
- VHDL实现的8位乘法器，所有仿真全部通过-VHDL to achieve 8-bit multiplier