资源列表
clock_18b20
- 基于lcd1602的温度计和数字时钟,包含详细的代码解释和实现方式-Lcd1602 based thermometers and digital clock
adc9280
- 模数转换，并把采样电压显示在数码管上，包含详细代码+详细资料-Analog-digital conversion, and the sampled voltage is displayed on the digital tube, containing detailed codes+ details
SPCQF
- 8路抢答器的Verilog代码实现，包含详细的资料和代码-8 Responder Verilog code that contains detailed information and code
source
- 实现永久流水灯的verilog .v文件-source verilog
run_flash
- 实现闪灯功能，在开发板运行时，通过按键来实现闪灯的目的。-Achieve flash function, run on a development board, through the key to achieve the purpose of the flash.
QuartusII_IP_Core
- 以设计双端口RAM为例说明QuartusII中利用免费IP核的设计的详细教程-To design dual-port RAM as an example of the use of a detailed tutorial QuartusII free IP core design
1_ADDER
- ADD加法运算可实现从0到10的加法运算-ADD addition can be realized 0 to 10 of the addition operation
fre_dev_v0.1
- 用verilog编写的频率可以控制的三角函数发生器,其中用matlab编写的sine表存入rom中-use verilog making the generator of sine and cosine
MIPS32SingleCycle
- VHDL Implementation of a 32bit Single Cycled MIPS.-VHDL Implementation of a 32bit Single Cycled MIPS.
FIFO-verilog-CODE
- FIFO存储器的Verilog设计与实现-FIFO verilog CODE
CY7C68013 Slave FIFO
- CY7C68013 Slave FIFO
设计IIR滤波器
- 设计IIR滤波器（带通，三种方法，fs=2000HZ,通带频率300~500HZ，阶数自选，画频率特性并分析比较）.