资源列表
bitcounter
- one bit up counter using VHDL code -one bit up counter using VHDL code
DFF
- D flip-flpo design using VHDL codes
zhitouzi
- 原创。掷骰子游戏，VHDL，quartus，北京邮电大学数电实验，实现随机掷骰子游戏，在数码管显示点数，点阵显示输赢，有开机动画以及开机音乐，可实现多人游戏等-games, VHDL, quartus,experiments of BUPT, pure originality,random game, in the digital display dots, dot matrix display winning or losing, there are boot animation and bo
VerilogHDL-entry-of-a-study-books
- VerilogHDL 入门必看书籍，通俗易懂的语言使初学者对建模有一个更直观的印象。-Getting VerilogHDL must-see books, in plain language so that beginners modeling a more intuitive impression.
xc6slx9_dnareader_12.4
- 读和验证Xilinx的DeviceDNA值，用于系统加密-Read and verify Xilinx Spartan6 DeviceDNA
3_05_SPI_Wr_Rd
- SPI读写实验，verilog源码，编译通过，有需要的拿去用-SPI source code
6_14_SOC_SD
- SD驱动，xilinx microblaze源码，编译通过，有需要的拿去用-SD source code
04_LCD1602_Display_Design
- LCD1602的verilog驱动源码，有需要的拿去用-lcd1602 source code
fsmc_fpga
- STM32单片机与FPGA 总线通信源码，编译通过，有需要的拿去用-stm32 fpga fsmc source code
qiduanxianshi
- Verilog代码段,包括七段数码管显示电路，调试通过的代码哦，很实用-Verilog code segments, including the seven-segment LED display circuit, code debugging through, oh, very practical
sht30
- 温湿度传感器sht30驱动，系统时钟为125M可读出温湿度。-sht30 driver,sysclk=125MHZ
bouncing_ball
- vga输出跳动小球代码，采用vhdl编码，通用各种fpga期间-vga outputs bouncing ball