资源列表
usb_host_device
- usb时钟的verilog描述，包含向量名定义，顶层设计等等的精确描述-usb clock verilog descr iption, including the vector name is defined, an accurate descr iption of the top-level design, etc.
pci
- pci总线的verilog描述，包含向量名定义，顶层设计等等的精确描述-usb clock verilog descr iption, including the vector name is defined, an accurate descr iption of the top-level design, etc.
AES
- 这是一个AES加密算法的程序，适用verilog hdl语言写的-A AES ALGORITHM
8BIT_CPU
- 一个8位的CPU设计，用verilog语言写的，希望有用-A CPU OF 8 BITS
A_CPU_verilog
- 这是一个verilog编写的CPU程序，希望对初学者有所帮组吧-a cpu
VLSI_RISC_chip_disk
- 这是《大型RISC处理器》书中附带光盘的内容，希望有用吧-a disk
barrel_shift
- This project si barrel shifter for an 8-bit
ADC_AD7490
- THIS PROJECT IMPLEMENTED ON VITERX 4 FPGA and THE COMPLETE SOURCE FILES testbench, design file UCF file are there and THIS ADC is maily configured with SPI protocol interface SPI CLK,SPI DATA, SPI LE, the SPEED OF OPERATION OF SPI CLK is 10 MHZ
sicendianti
- VHDL实现四层电梯的控制。状态机、编解码器、触发器、比较器。-Four layers of elevator control is realized by VHDL
vhdlll
- VHDL实现帧同步的巴克码器，含有移位寄存器，判决器、译码器。-VHDL realize frame synchronization barker code, contains a shift register, judgment, decoder.
wcdma_4carrier_01151621
- 数字光纤直放站上采用WCMDA8载波变频系统-WCMDA8 carrier frequency system using a digital fiber optic repeater
ddc_virtex5
- 数字光纤直放站上使用的V5一级变频系统，是其基带板的核心-V5-level inverter system used on the digital fiber optic repeater