- saving_txt_in_matlab matlab批量存储txt文件
- 1 c语言编辑的简易计算器
- invokeFiles 用python实现递归函数调用各目录下的文件夹
- SkDisplayRandom The author disclaims copyright to this source code. In place of a legal notice
- cupcms_v3.0.1_beta 杯子电影
- A-fuzzy-expert-system-for-loss-reduction-and-volt A fuzzy expert system for loss reduction and voltage control in radial distribution systems
资源列表
murty-vhdl
- these files are help full to develop vhdl codes
vdlcode
- learn about vhdl to implement for basic ckts-learn about learn about vhdl to implement for basic ckts
New-Folder
- to learn about some vhdl coding
New-Folder
- to learn bout development of vhdl code
miracle
- to implement the vhdl code for bacic ckts
alu
- A vhdl code for CPU unit with pipeling.It performs all basic operations like ADD,SUB,Shift
adder
- A VHDL code for adding two numbers.It takes two 8bit words and give sum as output.
calc_16_01_14
- A VHDL code for a simple calculator.It reads the operator and operands form the memory and execute
bit_synchronize
- fpga开发的位同步处理模块，能够实现功能并实现良好的效果-fpga developed bit synchronization processing module to achieve the function and achieve good results
DM9000A
- 用Verilog语言实现fpga对dm9000a的驱动-Achieve fpga for driving with Verilog language dm9000a
run time expandable cache
- Expandable cache proposed by Bournoutian and Orailoglu is very efficient in reducing miss rate and energy consumption with small area overhead. However, the original expandable cache with only one expansion scheme may lead to thrashing problems. In t
simplefft
- simplified fft implemented in verilog for 8 points