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文件名称:TFT_LCD

  • 所属分类：
    Picture Viewer
  • 标签属性：
    [PDF]
  • 上传时间：
    2016-09-25
  • 文件大小：
    2.76mb
  • 已下载：
    0次
  • 提 供 者：
    cha****
  • 相关连接：
    无
  • 下载说明：
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修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

产生逻辑画面的R/G/B/黑/白等画面的完整verilog源码，通过修改宏定义方便修改成支持各种尺寸的LCD驱动，本源码为RGB格式输出接口-Complete verilog source code generation logic screen R/G/B/black/white screen, etc., by modifying the macro definition modified to support a variety of convenient size LCD driver, the source for the RGB format and output interfaces
(系统自动生成,下载前可以参看下载内容)

下载文件列表

TFT_LCD/four_block_horizontal_gradient.v
TFT_LCD/fuse.log
TFT_LCD/fuse.xmsgs
TFT_LCD/fuseRelaunch.cmd
TFT_LCD/horizontal_gradient.v
TFT_LCD/image_controller.v
TFT_LCD/image_struct.v
TFT_LCD/ipcore_dir/coregen.cgp
TFT_LCD/ipcore_dir/create_DCM_CLK.tcl
TFT_LCD/ipcore_dir/create_fifo_256_24.tcl
TFT_LCD/ipcore_dir/create_fifo_256_24bit.tcl
TFT_LCD/ipcore_dir/DCM_CLK/clk_wiz_v3_6_readme.txt
TFT_LCD/ipcore_dir/DCM_CLK/doc/clk_wiz_v3_6_readme.txt
TFT_LCD/ipcore_dir/DCM_CLK/doc/clk_wiz_v3_6_vinfo.html
TFT_LCD/ipcore_dir/DCM_CLK/doc/pg065_clk_wiz.pdf
TFT_LCD/ipcore_dir/DCM_CLK/example_design/DCM_CLK_exdes.ucf
TFT_LCD/ipcore_dir/DCM_CLK/example_design/DCM_CLK_exdes.v
TFT_LCD/ipcore_dir/DCM_CLK/example_design/DCM_CLK_exdes.xdc
TFT_LCD/ipcore_dir/DCM_CLK/implement/implement.bat
TFT_LCD/ipcore_dir/DCM_CLK/implement/implement.sh
TFT_LCD/ipcore_dir/DCM_CLK/implement/planAhead_ise.bat
TFT_LCD/ipcore_dir/DCM_CLK/implement/planAhead_ise.sh
TFT_LCD/ipcore_dir/DCM_CLK/implement/planAhead_ise.tcl
TFT_LCD/ipcore_dir/DCM_CLK/implement/planAhead_rdn.bat
TFT_LCD/ipcore_dir/DCM_CLK/implement/planAhead_rdn.sh
TFT_LCD/ipcore_dir/DCM_CLK/implement/planAhead_rdn.tcl
TFT_LCD/ipcore_dir/DCM_CLK/implement/xst.prj
TFT_LCD/ipcore_dir/DCM_CLK/implement/xst.scr
TFT_LCD/ipcore_dir/DCM_CLK/simulation/DCM_CLK_tb.v
TFT_LCD/ipcore_dir/DCM_CLK/simulation/functional/simcmds.tcl
TFT_LCD/ipcore_dir/DCM_CLK/simulation/functional/simulate_isim.bat
TFT_LCD/ipcore_dir/DCM_CLK/simulation/functional/simulate_isim.sh
TFT_LCD/ipcore_dir/DCM_CLK/simulation/functional/simulate_mti.bat
TFT_LCD/ipcore_dir/DCM_CLK/simulation/functional/simulate_mti.do
TFT_LCD/ipcore_dir/DCM_CLK/simulation/functional/simulate_mti.sh
TFT_LCD/ipcore_dir/DCM_CLK/simulation/functional/simulate_ncsim.sh
TFT_LCD/ipcore_dir/DCM_CLK/simulation/functional/simulate_vcs.sh
TFT_LCD/ipcore_dir/DCM_CLK/simulation/functional/ucli_commands.key
TFT_LCD/ipcore_dir/DCM_CLK/simulation/functional/vcs_session.tcl
TFT_LCD/ipcore_dir/DCM_CLK/simulation/functional/wave.do
TFT_LCD/ipcore_dir/DCM_CLK/simulation/functional/wave.sv
TFT_LCD/ipcore_dir/DCM_CLK/simulation/timing/DCM_CLK_tb.v
TFT_LCD/ipcore_dir/DCM_CLK/simulation/timing/sdf_cmd_file
TFT_LCD/ipcore_dir/DCM_CLK/simulation/timing/simcmds.tcl
TFT_LCD/ipcore_dir/DCM_CLK/simulation/timing/simulate_isim.sh
TFT_LCD/ipcore_dir/DCM_CLK/simulation/timing/simulate_mti.bat
TFT_LCD/ipcore_dir/DCM_CLK/simulation/timing/simulate_mti.do
TFT_LCD/ipcore_dir/DCM_CLK/simulation/timing/simulate_mti.sh
TFT_LCD/ipcore_dir/DCM_CLK/simulation/timing/simulate_ncsim.sh
TFT_LCD/ipcore_dir/DCM_CLK/simulation/timing/simulate_vcs.sh
TFT_LCD/ipcore_dir/DCM_CLK/simulation/timing/ucli_commands.key
TFT_LCD/ipcore_dir/DCM_CLK/simulation/timing/vcs_session.tcl
TFT_LCD/ipcore_dir/DCM_CLK/simulation/timing/wave.do
TFT_LCD/ipcore_dir/DCM_CLK.asy
TFT_LCD/ipcore_dir/DCM_CLK.gise
TFT_LCD/ipcore_dir/DCM_CLK.sym
TFT_LCD/ipcore_dir/DCM_CLK.ucf
TFT_LCD/ipcore_dir/DCM_CLK.v
TFT_LCD/ipcore_dir/DCM_CLK.veo
TFT_LCD/ipcore_dir/DCM_CLK.xco
TFT_LCD/ipcore_dir/DCM_CLK.xdc
TFT_LCD/ipcore_dir/DCM_CLK.xise
TFT_LCD/ipcore_dir/DCM_CLK_exdes.ncf
TFT_LCD/ipcore_dir/DCM_CLK_flist.txt
TFT_LCD/ipcore_dir/DCM_CLK_xmdf.tcl
TFT_LCD/ipcore_dir/edit_DCM_CLK.tcl
TFT_LCD/ipcore_dir/fifo_256_24bit/doc/fifo_generator_v9_2_readme.txt
TFT_LCD/ipcore_dir/fifo_256_24bit/doc/fifo_generator_v9_2_vinfo.html
TFT_LCD/ipcore_dir/fifo_256_24bit/doc/pg057-fifo-generator.pdf
TFT_LCD/ipcore_dir/fifo_256_24bit/example_design/fifo_256_24bit_exdes.ucf
TFT_LCD/ipcore_dir/fifo_256_24bit/example_design/fifo_256_24bit_exdes.vhd
TFT_LCD/ipcore_dir/fifo_256_24bit/example_design/fifo_256_24bit_exdes.xdc
TFT_LCD/ipcore_dir/fifo_256_24bit/fifo_generator_v9_2_readme.txt
TFT_LCD/ipcore_dir/fifo_256_24bit/implement/implement.bat
TFT_LCD/ipcore_dir/fifo_256_24bit/implement/implement.sh
TFT_LCD/ipcore_dir/fifo_256_24bit/implement/implement_synplify.bat
TFT_LCD/ipcore_dir/fifo_256_24bit/implement/implement_synplify.sh
TFT_LCD/ipcore_dir/fifo_256_24bit/implement/planAhead_ise.bat
TFT_LCD/ipcore_dir/fifo_256_24bit/implement/planAhead_ise.sh
TFT_LCD/ipcore_dir/fifo_256_24bit/implement/planAhead_ise.tcl
TFT_LCD/ipcore_dir/fifo_256_24bit/implement/xst.prj
TFT_LCD/ipcore_dir/fifo_256_24bit/implement/xst.scr
TFT_LCD/ipcore_dir/fifo_256_24bit/simulation/fifo_256_24bit_dgen.vhd
TFT_LCD/ipcore_dir/fifo_256_24bit/simulation/fifo_256_24bit_dverif.vhd
TFT_LCD/ipcore_dir/fifo_256_24bit/simulation/fifo_256_24bit_pctrl.vhd
TFT_LCD/ipcore_dir/fifo_256_24bit/simulation/fifo_256_24bit_pkg.vhd
TFT_LCD/ipcore_dir/fifo_256_24bit/simulation/fifo_256_24bit_rng.vhd
TFT_LCD/ipcore_dir/fifo_256_24bit/simulation/fifo_256_24bit_synth.vhd
TFT_LCD/ipcore_dir/fifo_256_24bit/simulation/fifo_256_24bit_tb.vhd
TFT_LCD/ipcore_dir/fifo_256_24bit/simulation/functional/simulate_isim.bat
TFT_LCD/ipcore_dir/fifo_256_24bit/simulation/functional/simulate_isim.sh
TFT_LCD/ipcore_dir/fifo_256_24bit/simulation/functional/simulate_mti.bat
TFT_LCD/ipcore_dir/fifo_256_24bit/simulation/functional/simulate_mti.do
TFT_LCD/ipcore_dir/fifo_256_24bit/simulation/functional/simulate_mti.sh
TFT_LCD/ipcore_dir/fifo_256_24bit/simul

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