搜索资源列表
AD_1
- 基于FPGA的AD转换,AD芯片是TLC549,verilog-FPGA AD verilog
FPGA
- FPGA串口通信 Verilog -FPGA UART uartFPGA UART
fpga
- 《无线通信FPGA设计》书的源代码 ,包括matlab和verilog~-FPGA design of wireless communication book source code, to include matlab and verilog ~~
8051core-Verilog
- 用verilog在FPGA内部实现8051内核,超好、超难找的资料!共享出来!-Verilog FPGA internal 8051 core, super, super hard to find! Shared out!
verilog--password-lock
- 基于FPGA的密码锁 verilog- verilog FPGA password lock
verilog-procedures
- fpga的基于verilog的串行数据转并行数据的相关资料,相关内容uart协议,串并转换程序-verilog fpga-based serial data to parallel data, relevant information, relevant content uart protocol string and conversion program
Verilog
- 七段数码管译码器.(Verilog)[FPGA]第一个Verilog程序,七段共阴数码管摸索了好几天,终于能完成敲入代码、综合、仿真、绑定引脚至下载的全套工作了 -. 七段数码管的lookup table module SEG7_LUT ( input [3:0] iDIG, output reg [6:0] oSEG ) always@(iDIG) begin case(iDIG) 4 h1: oSEG = 7 b1111
Verilog
- 基于Verilog语言的实用FPGA设计(美)科夫曼-Verilog FPGA
UART-Verilog-source
- Verilog编写UART串口例程,实现FPGA与上位机串口通信,利用ASCII码进行大小写转换,在Xilinx Virtex-5开发板测试通过-UART serial routines written in Verilog, FPGA serial communication with the host computer using the ASCII code case conversion, in the Xilinx Virtex-5 development board test
FPGA 正交编码 verilog
- 用Verilog写的2倍频率正交编码的仿真测试程序,仿真波形已经调出
Verilog code about a VGA based ball and gun game
- This code can be performed directly on the SPARTAN-3A FPGA board as long as a VGA port is connected to this board. After initialization, a ball and gun will appear on the screen and you can control them and playing the game by using the button from t
FPGA IP cores
- FPGA IP cores on verilog for USB CY7C68013, VGA, Ethernet DM9000A, Sound WM8731.
fpga calculate
- 基于FPGA的建议运算器,可以实现加、减、乘等算术运算,通过开发板输入输出
fpga usb
- 基于fpga的usb端口verilog调试程序,可利用键盘鼠标控制开发板的一些动作
基于FPGA实现蜂鸣器播放音乐的功能
- 使用芯片为EP2C8Q208C8N,使用普通蜂鸣器,由于频率不同可实现放歌功能,本 例设计的是《友谊地久天长》,使用Verilog语言编程,本例子有工程文件、仿 真、波形,经过测试可以使用。
fpga-KEY-UART-SRAM
- fpga KEY UART SRAM 驱动 程序 VHDL VERILOG-fpga KEY UART SRAM driver VHDL VERILOG
fpga-LCD1602
- 本程序是用verilog开发的实现LCD1602的代码(This procedure is developed using Verilog, LCD1602 code.)
test1
- 七段译码器的verilog语言程序,功能由七根二极管来显示0到9数字的东西,就是显示器(seven-segment decoder)
VerilogHDL
- Samir Palnitkar-Verilog HDL_ a guide to digital design and synthesis-SunSoft Press (2003)
Palnitkar_Verilog_1996
- Samir Palnitkar-Verilog Digital Design Synthesis-SunSoft Press (1996)