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xilinx的硬核iic总线裸板调试源码，
可以在linux下编译也可在xilinx的sdk中编译-xilinx iic bus hardcore bare board debugging source code can be compiled under linux can also compile the xilinx sdk
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zedboard开发板硬核串口调试源码，
可以在linux下编译也可在xilinx的sdk中编译-zedboard hard core development board serial debugging source code can be compiled under linux can also compile the xilinx sdk
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This the bowling score source code.
Edit tool is xilinx corp ISE.
I used the Modelsim for simulation.-This is the bowling score source code.
Edit tool is xilinx corp ISE.
I used the Modelsim for simulation.
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基于Xilinx FPGA的OFDM通信系统基带设计一书的源代码 -this is source code from a book
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Xilinx ISE9.x FPGA_CPLD一书的例程代码-Xilinx ISE9.x FPGA_CPLD a book routines code
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xilinx 基于查找表方法实现的IDCT的verilog源码-Xilinx LUT-based method to achieve the IDCT of the Verilog source code
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内存测试程序，包含完整的源码。在xilinx的sdk环境下运行-Memory testing procedures, including complete source code. Run under the xilinx sdk environment
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Verilog Source code for arbitrary waveform generator- simple DDS algorithm codes run on Xilinx Spartan-3E fpga to show output on dac pin.
Please see the included report. its really simple to implement. all source code is given.
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xilinx工程文件，test8.v是源代码，实现了逐位进位的加法器、减法器，和逻辑运算功能。运行通过，仿真成功。-Xilinx engineering documents, test8. V is the source code, to achieve the cascaded carry adder, subtracter, and logical operations function. Running through, the simulation is successful.
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xilinx赛灵思的DDR控制器源码（包括仿真与说明文档），DDR为mt46v4m16。-Xilinx DDR controller source code (including simulation and documentation), DDR is mt46v4m16.
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Verilog编写UART串口例程，实现FPGA与上位机串口通信，利用ASCII码进行大小写转换，在Xilinx Virtex-5开发板测试通过-UART serial routines written in Verilog, FPGA serial communication with the host computer using the ASCII code case conversion, in the Xilinx Virtex-5 development board test
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Xilinx UARTLITE bootloader driver Source Code for Linux.
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Xilinx SP605评估板 Aurora IP(GTP 简单协议) 核功能验证 调试源代码 chipscope验证通过-Xilinx SP605 Evaluation Kit Aurora IP core functional verification debugging source code and chipscope verified
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Verilog 实现的 UART串口读写控制核 参数化校验、时钟设置，完整工程（xilinx），包括文档、源码等。供学习参考，希望大家上传自己代码，共同提高，打倒小日本。-Verilog implementation of the UART serial port to read and write control nuclear parametric check, clock setting, complete project (Xilinx), including documentation
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压缩包中包含AMC7823模拟监视控制芯片的数据手册以及本人编写的驱动以及示例程序；在Xilinx ISE下的SDK环境下编写；在ZedBoard 下测试能够正常使用。-Compressed packet contains AMC7823`s data sheet ,witch is an analog monitoring and control circuit.And I write the driver and the sample program in Xilinx ISE SDK en
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基于Xilinx公司的ISE软件开发的智能循迹避障小车的源代码，用Verilog语言，传感器有红外传感器以及超声波传感器-Xilinx' s ISE-based software development intelligent car tracking avoidance source code, using Verilog language, the sensor has an infrared sensor and ultrasonic sensors
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用FPGA实现OFDM系统，硬件语言为Verilog，环境为xilinx，详细介绍了接收机和发射机各个模块的源代码-OFDM system with a FPGA implementation, hardware language Verilog, environment xilinx, details of receiver and transmitter modules source code
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SD驱动，xilinx microblaze源码，编译通过，有需要的拿去用-SD source code
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Xilinx的IP核源码例化，可实现分频和倍频处理，亲测成功-Xilinx instantiated IP core source code, which can realize frequency and frequency doubling processing, measuring success
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xilinx 多核嵌入式系统设计的配套光盘源代码-Xilinx multi-core embedded system design form a complete set of CD source code
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