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uart16550
- uart16550 ＩＰ核 ＨＤＬ源代码，对设计自己uart的人员和学习串口通讯有一定的参考价值！其中，附有详细的所明文档！-uart16550 IP HDL source code, uart to design their own study of serial communication and has some reference value. Which, with detailed documentation as prescribed!
uart_verilog
- 包含UART口的VERILOG源程序，该程序在FPGA上验证通过，可作为芯片设计，或FPGA设计的一个完整IP核，硬件设计的兄弟们可参考一下。-include UART port of VERILOG source, the program tested in FPGA, as chip design, or FPGA design of a complete IP cores, hardware design brothers can make reference.
uart2bus
- uart接口到内部总线的IP核，采用VDHL和VERILOG语言编写。-UART interface to Bus IP Core in VHDL and verilog languages
Micrium
- 从Luminary官方网站下载的LM3S6000系列的UCos+Tcp/IP的源码, 经本人稍微修改后可直接在IAR6.2下编译通过,里面包括了LM3S6000系列的所有外设UART, PWn....的驱动,强烈推荐啊-Luminary download from the official website of the LM3S6000 series UCos+ Tcp/IP source code, slightly modified by himself directly in IAR6.2
Linux_serial_network
- Linux为串口上网提供了丰富的支持，比如PPP（Peer-to-Peer Protocol, 端对端协议）和SLIP（Serial Line Interface Protocol, 非常老的串行线路接口协议），这里所说的"上网"是指把串口当成一个网络接口，通过封装网络数据包（如IP包）以达到无网卡的终端可以通过串口进行网络通 信。但是使用这两种协议必须得到内核的支持。例如，如果在没有配置PPP的Linux环境中使用PPP，除了安装PPP应用层软件外，还必须重新编译内 核。SLIP是一个比较老的
miniuart2
- 用ＶＨＤＬ在CPLD/FPGA上实现与PC机的RS232通信-This UART (Universal Asynchronous Receiver Transmitter) is designed to make an interface between a RS232 line and a wishbone bus, or a microcontroller, or an IP core. It works fine connected to the serial port of a
LM3S8962KeilTEST
- LM3S8962 KEIL下实验例程, 包括GPIO操作，I2C，UART,PWM,CAN,TCP/IP-LM3S8962 assembling enviroment MDK
mb_support_sram
- 配置MB软核使其支持，SRAM并在此基础上做UART测试，文章（我写的呵呵）详细的讲了如何从最对SRAM时序进行配置，如何设置相应参数，如何生成硬件平台，实在是入门必备。-configure the MB ip core to support SRAM .and ,do a test with dsp uart
IP-UART
- 基于C8051F340的CP2200以太网程序-Based CP2200 Ethernet program of C8051F340
Net232LPC2366_3
- ADS1.2 LPC2366 tcp/ip uart i/o code
05_UART_demo
- 该UART实例是很简单的EDK工程，在PLB总线上挂载了XPS-uartlite外围设备，作为串口的控制器，一般的EDK工程会将该IP作为基本外围设备来使用。包含bit流文件(在EDK上下载到FPGA上使用），和说明文档。-The UART instance EDK project is very simple and is mounted on the PLB bus the XPS-uartlite peripherals, general EDK works as a serial con
PROJECTS_C8051F320
- c8051f320 projects eeprom, udp, tcp/ip, uart, sd card interfacing
SimpleWiFi
- 串口wifi 串口转wifi uart wifi UART转WiFi COM口配置工具，SimpleWiFi 串口WiFi配置工具。-SimpleWiFi is the new generation embedded Uart-WiFi modules. SimpleWiFi is an embedded module based on the Uart serial,according with the WiFi wireless WLAN standards, It accords wi
uart2bus_latest.tar
- 这是一个用Verilog HDL和VHDL设计的UART控制器的IP核，里面有详细的源代码-This is a Verilog HDL and VHDL design UART controller IP core, which has detailed source code
A8251
- Altera Quartus Megacore of A8251 (UART). Published by Altera for free after the IP Megacore portfolio has changed.
uart2spi_latest.tar
- UART转SPI IP核，测试可用，包括测试文件，Modelsim环境-UART to SPI IP core test available, including test papers, Modelsim environment
CoreUartTest
- Actel FPGA UART 串口通信模块，调用Actel CoreUART IP核实现。已在Microsemi Actel FPGA A3PE1500 硬件验证通过。-Actel FPGA UART serial communication module, call Actel CoreUART IP core implementation. Verified by Microsemi Actel FPGA A3PE1500 hardware.
Uart_to_bus
- The UART to Bus IP Core is a simple command parser that can be used to access an internal bus via a UART interface. The parser supports two modes of operation: text mode commands and binary mode commands. Text mode commands are designed to be used wi
Breeze_STM32_CAN_485_20140312
- 该程序基于STM32F103ZET6平台，集成DMA,IIC,SPI,UART,CAN,485驱动通过W5100实现基于TCPIP的远程组网，CAN/485控制，并通过LCD（驱动芯片ST7920）实时显示（本例程不包含GUI）(The program, based on the STM32F103ZET6 platform, integrates DMA, IIC, SPI, UART, CAN, and 485 drives a TCPIP based remote networking t
国产FPGA参考设计IPCORE_UART_example_M5&M7
- 国产FPGA的UART参考设计IPCORE源代码。 The IP provides two kinds of simplified interface connected to EMIF bus and AHB bus for communication with 8051 core and ARM core.The two kinds of interface are full-duplex serial communication interface. Support programmabl