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PushButton_Debouncer
- KEY INPUT DEBUNCE VERILOG-KEY INPUT DEBUNCE verilog
061118PS2IPCORE
- PS2的程序，是一个IPCORE，相信对于需要的人一定很有帮助-PS2 procedures, a IPCORE, and I believe the people will definitely need helpful
suij
- 硬件编程实现伪随机交织器和随机交织器，应用环境Quartus II5.0-hardware programming pseudo-random interleaver and random interleaver, application environment Quartus II5.0
1_070116141639
- verilog编程ps2接口设计,基于fpga的设计-verilog ps2 Programming Interface design, the design based fpga
viterbi219
- viterbi219源代码 希望对大家有帮助！-viterbi219 source code you want to help!
dig_clk_lcd
- 数字钟的实现，由LCD动态显示，VHDL语言实现-the realization by the dynamic display LCD, VHDL
waterlight
- 简易流水灯实验，四灯依次点亮，循环VERILOG语言-simple experiment water lights, four lights were lit, recycling verilog language
jpeg_yuce
- 预测编码dpcm 的verilog代码，此文件为V文件-predictive coding dpcm verilog code of this file documents for V
crc_32_16
- crc校验功能，用硬件语言实现，vhdl或者verilog实现。逻辑功能。-crc check function, hardware language, verilog or vhdl achieve. Logic function.
mipsinverilogandvhdl
- mips prcessor in Verilog and vhdl-mips prcessor in vhdl and Verilog
ddschengxu
- dds程序 有原理图 代码 哈哈 dds程序 有原理图 代码 -dds procedures diagram code says dds procedures diagram code
verilog111
- verilog 的东西好好用的呢，那是verilog 学习者的必备东西哦-verilog things properly used it, it is an essential learners verilog things oh
user_logic_Open_I2C
- iic implementation,用verilog实现了IIC标准协议的功能-iic implementation, verilog achieved using standard protocols IIC function
Verilog11
- 这个是用可编程器件进行仿真CPU的程序，大家一起分享拉-this device is programmable CPU simulation procedures to share with everyone Rafah
jpeg压缩中的DCT蝶型算法verilog代码
- jpeg压缩中的DCT蝶型算法verilog代码-jpeg DCT compression algorithm verilog code BUTTERFLY
CANbuscontroller
- This source file may be used and distributed without restriction provided that this copyright statement is not removed from the file and that any derivative work contains the original copyright notice and the associated disclaimer. -This source file
licheng
- 本程序为Verilog扫描键盘成,然后送给51单片机处理的程序.-Verilog the procedures for scanning into the keyboard, then were sent to 51 micro-processing procedures.
risc_8051_v
- 流片过的risc_8051源代码 verilog语言描述的~-flow unit off risc_8051 verilog language source code described in the ~
GPS_code_nco
- 这是GPS接收机，基带处理模块中累加模块设计代码，用于码跟踪环。代码设计巧妙，避免了消耗FPGA中比较稀缺的硬件乘法器资源。-This is the GPS receiver, Baseband Processing Module cumulative module design code for the code tracking loop. Code so cleverly designed to avoid the consumption of more FPGA hardware mul
CA_GEN
- 这是GPS接收机，基带处理模块中CA码产生模块设计代码，用于码跟踪环。代码设计巧妙，采用了后台机配合的方式，可以灵活产生各卫星的PN码，节约了触发器资源-This is the GPS receiver, Baseband Processing Module CA code generator module design code for the code tracking loop. Code so cleverly designed and adopted a background with