搜索资源列表
amba3core.rar
- amba3 sva 完全验证的代码，有verilog的和systemverilog的,amba3 sva fully validate the code, and the Verilog and SystemVerilog
AN151
- AMBA Application Note: AN151 - Using EB with example AXI Logic Tile. -AMBA Application Note: AN151- Using EB with example AXI Logic Tile. This example shows how to use the EB baseboard with an example AXI Logic Tile. The following board c
apb_slave
- AMBA 2.0 APB Example- SRAM -AMBA 2.0 APB Example- SRAM
axis-kickstart
- 先配置好JDK 和Tomcat。本文中使用的是JDK 5.0（源代码是1.4 的）。Tomcat 是5.0.28。 下载AXIS 1.4，地址http://ws.apache.org/ 安装AXIS 解压开axis1_ 4.zip ，将axis1_ 4/webapps/axis 拷贝到 $TOMCAT_HOME/webapps/ 下启动tomcat，打开页面http://localhost:8080/axi s 页面正常，表示axis 安装正确。-First conf
15-IP-core
- 15个免费的IP核 IP核源代码 -15 IP cores
AMBA-Specification-Rev-2.0
- AMBA2.0总线协议详细介绍，共230叶英文资料-AMBA2.0 bus protocol details, a total of 230 leaves information in English
AirFoil_grid
- This Fortran Program develop for NACA0200 Airfoil Axi-symmetric grid generation. The grid is clustered in x. Program is basic level for under graduate students.
AXI slave
- 使用verilog语言实现了AXI总线通信协议的从机部分(The slave part of AXI bus communication protocol is realized by using Verilog language)
slave
- xilinx Zynq 中的AXI总线 axi slaver模块(AXI bus Axi slaver module in Xilinx Zynq)
axi_dma
- 在zedboard开发板上采用vivado通过AXI进行DMA数据传输(Using vivado to transfer DMA data through AXI on zedboard development board)
AMBAaxi
- amba axi specification
axi_slave
- amba总线中axi的slave部分，用verilog实现的slave.(The slave part of Axi in the AMBA bus, slave. implemented with Verilog)
my_led_ip
- 四通道axi LED灯控制器，用于嵌入式系统中的一些功能指示(The four channel Axi LED lamp controller is used for some function instructions in the embedded system)
AXI_testv1.00
- 添加ILA逻辑分析仪观测AXI总线时序，根据时序可以自行对AXI总线进行应用。(Adding ILA logic analyzer to observe the time sequence of AXI bus)
axi lite 接口
- 该文件完成了简单的axi lite 接口协议 Verilog 语言编程。欢迎交流讨论
emif2axi
- emif 接口转axi总线,测试功能正常使用，不包含仿真文件(EMIF interface to Axi bus, test function is in normal use, does not contain simulation files)
AXI&APB2SPI
- APB总线转SPI接口模块SV代码以及AXI总线转SPI接口模块SV代码(SV code of APB bus to SPI interface module and SV code of Axi bus to SPI interface module)
axi slave model
- axi slave model,verilog源码
AXI slave
- AXI slave 完整 verilog代码。测试验证通过。
zynq axi dma驱动程序
- 基于zynq嵌入是linux axi dma驱动程序代码，可利用axi总线实现arm与fpga数据交互。