搜索资源列表
AXI_Master_FSM
- AXI Master, is implement with FSM
axi_slave
- AMBA axi利用verilog搭建的axi_slave模块-AMBA axi use verilog module built axi_slave
axi_bfm_ug_examples.tar
- axi_bfm_ug_examples axi bus function model user guide examples-axi_bfm_ug_examples axi bus function model user guide examples
lab1
- AXI-Lite bus with SPI on System C
axi_master_latest.tar
- axi 总线 设计 和 仿真， 可以在设计中直接运动， 提供完整源代码和仿真文件， 用vhdl 语言实现。-axi bus design and simulation, you can directly exercise in design, providing full source code and simulation files, using vhdl language.
xilinx_axienet_mdio
- MDIO bus driver for the Xilinx Axi Ethernet device.
llcp
- mmp AXI peripharal clock operation source file.
axi_master
- 自己写的 AXI master code-AXI master code
AXI_slave
- 自己写的 AXI slave 代码，是ARM 内嵌的 总线通信-AXI slave code
of_xilinx_wdt
- Watchdog Device Driver for Xilinx axi xps_timebase_wdt.
adi-axi-spdif-tx
- partial power down enable for Linux v2.13.6.
axi_dispctrl
- zynq AXI display controller source for zybo
xilinx_can
- Xilinx Axi CAN Zynq CANPS controller Device Tree Bindings.
axis_fifo
- VIVADO下使用verilog编码的axi fifo的简单使用，仿真通过，供初学者学习。-Use the following VIVADO verilog coding axi fifo simple to use, through simulation, for beginners to learn.
AXI_VIP
- axi vip code used in almost all the interface projects in the soc and verification environments in arm processors
axi-clkgen
- This binding uses the common clock binding.
exynos-pmu
- Driver for ARM AXI Bus with Broadcom Plugins (bcma).
pcie-xilinx
- PCIe host controller driver for Xilinx AXI PCIe Bridge.Based on the Tegra PCIe driver.
clk-apmu
- mmp AXI peripharal clock operation source file.
of_xilinx_wdt
- Watchdog Device Driver for Xilinx axi xps_timebase_wdt.