搜索资源列表
uart_VHDL
- uart的vhdl实现代码 分模块设计和状态机设计 不错的，用它没错-UART achieve the VHDL code modular design and state machine design good, the right to use it
spi
- SPI master的verilog代码-Verilog code for SPI master
uart16550
- uart16550 is a 16550 compatible (mostly) UART core. The bus interface is WISHBONE SoC bus Rev. B. Features all the standard options of the 16550 UART: FIFO based operation, interrupt requests and other. The datasheet can b
UART
- 内含有完整的UART代码，包括发送和接受，且有testbench，可以直接仿真调试-Contain complete UART code, including send and receive and there testbench, can directly Simulation debugging
cpldpcvhdl
- cpld与pc机通信的VHDL代码，用于模拟cs232收发功能-CPLD with VHDL communication pc machine code, used to simulate the transceiver function cs232
pro104_uart
- uart的代码，经实际运行可以通信，是xilinx uart 代码的改进，网上的xilinx uart代码有很多bug，用此代码可以改进运行。-UART code, the actual operation can be communication, xilinx uart code are improved, xilinx uart code online has a lot of bug, the code can be improved with this operation.
usb_funct
- USB 2.0 verilog源代码,内包含详细文档资料。-USB 2.0 verilog source code, which contains detailed documentation.
chuankoutongxin
- 串口通信的概念非常简单，串口按位（bit）发送和接收字节。尽管比按字节（byte）的并行通信慢，但是串口可以在使用一根线发送数据的同时用另一根线接收数据。它很简单并且能够实现远距离通信。比如IEEE488定义并行通行状态时，规定设备线总常不得超过20米，并且任意两个设备间的长度不得超过2米；而对于串口而言，长度可达1200米。典型地，串口用于ASCII码字符的传输。通信使用3根线完成：（1）地线，（2）发送，（3）接收。由于串口通信是异步的，端口能够在一根线上发送数据同时在另一根线上接收数据。其
VHDL
- 可用于FPGA的用VHDL语言写的关于串口通讯的源代码-FPGA can be used in the VHDL language used on the source code for serial communication
UARTcode
- 串口UART通用异步接收/发送器的VHDL 源代码-Serial UART code
cordic1.0
- this coric code is very compact.
I2C
- This the source code for I2C(Inter Integreted Circuit) which is used in serial communication-This is the source code for I2C(Inter Integreted Circuit) which is used in serial communication
RS485
- c8051f040单片机做的485通信源代码，适合工程。-c8051f040 microcontroller 485 to do the source code, for engineering.
HDLC_VHDL
- 用VHDL实现从以太网到并行数据以及从并行数据到以太网的HDLC成帧解帧.附详细代码说明,方便阅读.可方面移植到Altera及Xilinx等厂家芯片,是做基于FPGA的以太网设计的好资料-Achieved using VHDL and parallel data from the Ethernet to parallel data from the HDLC framing solution to Ethernet frames. Attached detailed code instructi
a_vhd_16550_uart_latest.tar
- 16550 uart vhdl source code
uartvhdl
- 该程序是基于UART的控制，有VHDL和verilog的源码，共有兴趣的朋友参考-The program is based on the UART' s control, there is VHDL and verilog source code, a total interest of a friend reference
VHDLsourcecode
- VHDL编写的基于过采样的串口代码，在epm3256中编译通过，值得参考。-Written in VHDL-based over-sampling of the serial code, compiled by the epm3256, worth considering.
HAMMING_CODE_vhdl
- 用vhdl语言编写的汉明码的发送与接收，并在fpga开发板上实现-With the Hamming code written in vhdl sending and receiving, and fpga development board implementation
uart
- Code VHDL/Verilog for UART FPGA: Xilinx, Altera-Code VHDL/Verilog for UART FPGA: Xilinx, Altera...
2freq_uart_se
- 高精度串口频率计VHDL源码，开发环境为Quartus II 9.0，频率范围为0-1MHz-Precision frequency meter serial VHDL source code, development environment for Quartus II 9.0, the frequency range of 0-1MHz