搜索资源列表
ML-estimation
- ofdm系统下经典的同步方法：基于前导序列的定时同步，符号同步-ofdm systems classical synchronization: Based on the leading sequence timing synchronization, symbol synchronization
tcd1209d
- 根据 TCD1209D 的结构及工作原理，我们知道驱动时序的准确性决定了 TCD1209D 输出信号的性能。本课题中设计的 TCD1209D 驱动时序，典型稳定工 作频率为 1MHz ，最高工作频率为 10MHz。 -According to TCD1209D the structure and working principle, we know the accuracy of timing-driven TCD1209D output signal determines the
bpsk--through-Rayleigh
- BPSK调制信号的时序波形，并通过瑞利衰落信道-BPSK modulated signal timing waveformsand through TheRayleigh Fading Channel
stm32-CHPA-CHOL
- stm32时钟时序和时钟极性的配置，解决你头疼的问题-stm32 clock timing and clock polarity configuration to solve your headache
name
- 电子钟的设计电子钟需要一个时钟基准信号，产生基本的而且准确的计时单位，根据实验室的实际环境，我们可以设计一个变量来计算时钟基准信号的个数，来达到计时的目的。例如用计时器计1S，计数到60时可以产生1min的定时。然后计数器清零，分加1。循环反复计数。由此实现电子钟的设计。 对于能够调节分、秒值的电子钟，当触发某一按键时，通过执行相应的程序而去对分、秒值进行加减。 所以在这里把问题归结找到计时的基本单位，并编写对应按键的程序。 -The design of electronic clo
bzksxt
- 标准化考试系统，java代码，可以任意一套标准考试试题，并对其进行计时等操作。-Standardized test system, java code, can any set of standard examination papers, and its timing and other operations.
cmd
- 1.《软件测试计划》（STP)描述对计算机软件配置项CSCI,系统或子系统进行合格性测试的计划安排。内容包括进行测试的环境、测试工作的标识及测试工作的时间安排等。 2.通常每个项目只有一个STP,使得需方能够对合格性测试计划的充分性作出评估 -1. " Software Test Plan" (STP) describes the computer software configuration item CSCI, system or subsystem qualifi
ADS1259
- 24位ADC ADS1259技术手册，详细的功能和特性说明，寄存器时序操作，还有电路解说-24-bit ADC ADS1259 technical manuals, detailed descr iption of functions and features, register timing operation circuit explanation
1.PIMRC_05
- SINR Estimation of OFDM-CDMA Systems with Constant Timing Offset : a Large System Analysis
about-spi
- 主要讲的的spi的相关概念和spi的时序问题，不懂spi的可以-Mainly about the spi spi-related concepts and issues of timing, do not know can see spi
tcoug
- Synopsys公司出品的Timing Constraints and Optimization User Guide-Synopsys Timing Constraints and Optimization User Guide
MCU-function
- 要了解一款MCU，首先需要知道就是其ROM空间、RAM空间、IO口数量、定时器数量和定时方式、所提供的外围功能模块（Peripheral Circuit）、中断源、工作电压及功耗等等。-For an MCU, you first need to know is its ROM space, RAM space, IO port number, quantity and timing timer mode, the external function modules provided by (Pe
An-Introduction-to-Parallel-and-Vector-Scientific
- In this text, students of applied mathematics, science and engineering are introduced to fundamental ways of thinking about the broad context of parallelism. The authors begin by giving the reader a deeper understanding of the issues through a genera
verilog-ieee.pdf.tar
- IEEE 2001 verilog 标准 ,详细讲述了 业内 公认的 VERILOG 标准 ,-The Verilog¤ Hardware Descr iption Language (Verilog HDL) became an IEEE standard in 1995 as IEEE Std 1364-1995. It was designed to be simple, intuitive, and effective at multiple levels of abstractio
Timing_on_the_PC_under_DOS
- Application notes: Timing on the PC family under DOS
PCI-104-v1_0
- 详细描述了PC104总线的时序,是学习PC104总线的好资料。-Detailed descr iption of the PC104 bus timing is good information to learn PC104 bus.
T315XW01-V5
- T315XW01-V5规格书。包括各个引脚的功能说明。时序图等-T315XW01-V5 specifications. Including the descr iption of the function of each pin. Timing diagrams
LabVIEW-Timing
- 关于labVIEW编程中定时的研究，比较各个定时的实际应用-Regular programming on labVIEW study to compare the practical application of all time
sdr_sdram_altera
- ALTERA的SDRAM的控制器和时序文档说明，很详细也很简洁，是一份不可多得的SDRAM开发的参考文档-ALTERA and timing of the SDRAM controller documentation, very detailed but also very simple, is a rare development of reference documentation SDRAM
ads1110_data
- ads1110的中文资料，及英文资料，介绍了它的工作方式，时序，及计算转换值的方法。-ads1110 information in Chinese, and English information on its working methods, timing, and calculate conversion values.