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ISE-TIMING-analyse-for-chinese-
- ISE在时序约束时详细步骤.针对高速时钟下的时序不满足时的设计.-ISE timing constraint in the detailed steps.
DVI_timing
- DVI的时序说明，有了这个，才能开发DVI显示接口，没有这个寸步难行-DVI timing instructions, with this in order to develop DVI display interface, without this move an inch
VESA-timing-dmt10
- VESA显示分辨率标准，详细介绍各个显示分辨的timeing参数，开发电脑和电视的好文档。-VESA display resolution standards, details of the various display distinguishable timeing parameters, the development of computer and television, a good document.
DDR
- 关于DDR SDRAM的详细原理和时序分析,对于开发设计有很大使用价值-DDR SDRAM on detailed principles and timing analysis, design for the development of a great value
qd_StandardTiming[1]
- 各种制式，各种接口的视频信号 TIMING 表格。 ALL AVAILABLE VIDEO TIMING。 -A variety of formats, all kinds of video signal interface TIMING forms. ALL AVAILABLE VIDEO TIMING.
Ashort-timeFouriertransformbasedsymboltimingaproac
- A short-time Fourier transform based symbol timing approach for OFDM systems
1
- Coarse Symbol Timing Synchronization (CSTS) algorithm for OFDM systems that is robust to a multi-path fading channel
Static_Timing_Analysis
- 静态时序分析设计的经典教程书籍 全面，权威的讲解，丰富的内容举例-Static timing analysis tutorial books classic design a comprehensive, authoritative presentation, rich content, for example
6732448-Basic-Timing-Constraints-Tutorial
- timing constraints in fpga
frequencymeter
- 数字频率计课程设计 描述计时功能等功能-Digital frequency meter function of curriculum design, timing and other functions described in
Advanced-Xilinx-FPGA
- Advanced Xilinx FPGA Design with ISE Objectives Describe Virtex™ -II advanced architectural features and how they can be used to improve performance • Create and integrate cores into your design flow using the CORE Generator™
VX1828BBrief
- timing lcd controller
lcdtimingcontrollervx1828
- lcd timing controller
Timing
- 定时误差估计，精度很高，算法简单易于实现，很值得参考！-Timing error estimates, precision is high, the algorithm simple and easy to implement, it is worth considering!
0909.0573
- this a paper on minimizing cache timing attack on aes using cache flushing algorithm-this is a paper on minimizing cache timing attack on aes using cache flushing algorithm
Interpolation_in_digital_modems_II
- This paper shows the schemes for interpolation filters, loop filters in Gardner model for perform Timing Recovery in Digital Communications
LTE_transmition_technoiques
- 分析了LTE系统频率偏移，定时误差，信道估计问题等，并对广义Rake接收机和CPEDS接收机的性能做了比较。-Analysis of the LTE system frequency offset, timing error, channel estimation problems, and generalized Rake receiver performance receiver and CPEDS were compared.
aa
- 如何读时序图之经典资料（其中一个为国外的）CSDN上下的-How to read timing diagram of the classical information (one of which is foreign) CSDN top to bottom
timing
- timing recovery using squaring method
How-to-read-timing-diagram
- 时序 ，就是按照一定的时间顺序给出信号 就能得到你想要的数据，或者把你要写的数据写进芯片 -Timing Timing is given by a certain time sequence signal can get the data you want, or you write the data written into the chip