搜索资源列表
HUAWEI-MG323-MOUDULE-Design1.00
- MG323模块开发指南1.00是针对华为2G模块开发的一款详细的技术文档资料，对MG323模块的操作、控制以及开关机时序等都有详细的资料，是开发MG323不可多得的、必备的技术资料。-MG323 Module Development Guide 1.00 2G module for the development of a Huawei detailed technical documentation on the MG323 module operation, control and swit
Gardneralgorithm
- 数字接收机中的Gardner定时同步算法-Digital receiver in the Gardner Timing Synchronization Algorithm
VESA-timing-dmt10
- VESA显示分辨率标准，详细介绍各个显示分辨的timeing参数，开发电脑和电视的好文档。-VESA display resolution standards, details of the various display distinguishable timeing parameters, the development of computer and television, a good document.
DVB
- 通过分析8PSK 调制方式的载波恢复、定时恢复算法, 提出了一种适用于新一代数字卫星电视标准DVB S2 的全数字解调算法, 改进了相位频率检测( PFD) 算法以适合于8PSK 解调. 载波恢复采用频率检测( FD) 和相位频率 检测相结合的结构, 跟踪范围超过1 倍符号率. 采用Gardner TED 算法进行定时恢复.-By analyzing the 8PSK modulation carrier recovery, timing recovery algori
Digital_Responder(Digital_Circuit)
- 数字抢答器由主体电路与扩展电路组成。优先编码电路、锁存器、译码电路将参赛队的输入信号在显示器上输出；用控制电路和主持人开关启动报警电路，以上两部分组成主体电路。通过定时电路和译码电路将秒脉冲产生的信号在显示器上输出实现计时功能，构成扩展电路。经过布线、焊接、调试等工作后数字抢答器成形。-Answer the number is controlled by the main circuit and the expansion of circuit components. Priority enco
MMCSDTimming
- This document represents timing diagrams of MMC and SD bus interfaces.
AVR-baseonAT24C16
- 首先介绍I2C总线的的一些基本知识：特点、结构、原理、控制时序、与单片机的接口方法等。最后通过一个实例实现模拟I2C接口。-First of all I2C bus introduce some basic knowledge of: characteristics, structure, principle, control timing, and MCU interface methods. Finally, through an example of analog implementati
MMCSDTimming
- MMCSDTimming MMC卡的时序图，比起SD规范又臭又长的文档，要简洁的多了。SD卡也可以以此作为参考-MMCSDTimming MMC card timing diagram, compared to SD specification also documents a long foul, it is necessary to more concise. SD card can also be used as a reference
Gcpad
- 工程技术文档：Game Cube游戏机手柄通讯命令与时序-Engineering and technical documentation: Game Cube console command handles communication with the timing
TheResearchAndIPDesignOfSMBusBasedSmartBattery
- 本文研究了SMBus 规范，介绍了典型的基于片上系统（SoC）设计的知识产权核（IP）实现，采用自顶向下 (Top-down)的集成电路设计方法完成了设计，并架构了基于总线功能模型(BFM)的验证平台 完成功能仿真，顺利完成了逻辑综合和时序仿真。FPGA 验证和投片后测试均表明设计具有 良好的性能。-This paper studies the SMBus specification, based on the introduction of the typical system
DC
- 工程技术文档：DC游戏机手柄通讯命令与时序-Engineering and technical documents: DC console command handles communications with the timing
1
- Coarse Symbol Timing Synchronization (CSTS) algorithm for OFDM systems that is robust to a multi-path fading channel
obdii-protocol-init
- OBDII Protocol Init (HEX and timing descr iption)
Interpolation_in_digital_modems_II
- This paper shows the schemes for interpolation filters, loop filters in Gardner model for perform Timing Recovery in Digital Communications
aa
- 如何读时序图之经典资料（其中一个为国外的）CSDN上下的-How to read timing diagram of the classical information (one of which is foreign) CSDN top to bottom
7-Timing_Recovery
- timing recovery Symbol Timing Synchronization 1 2
synchronization
- GARDNER algorithm used the timing of the simulation module, enter each symbol four sampling points, by interpolation, the output value of one sample
VESA-Timing-Reference
- VESA视频接口编程时序参考手册，视频格式1024*768分辨率，刷新速率60Hz-VESA Monitor Timing Reference Guide for Programming, 1024*768 @60Hz
FX3-GPIF--timing-design
- EZ-USB FX3 GPIF接口的时序设计 文章以同步从模式为例-FX3 ez-usb GPIF interface timing design Based on synchronous from mode as an example
High-Speed-All-Digital-Symbol-Timing-Recovery-Bas
- High Speed All Digital Symbol Timing Recovery Based on FPGA