搜索资源列表
SPI-in-Verilog-implementation
- SPI的Verilog实现(非常的全面和详细，还带有SPI算法的注解).-SPI in Verilog implementation (a very full and detailed, but also with the SPI algorithm annotation).
Dual_port_RAM
- 很精彩的双端口RAM应用笔记，对搞单片机、FPGA的都有帮助。-dual_port_ram
iic_master
- it is a iic source verilog code with its testcase which can act only as master
vga
- VGA驱动及显示程序，用Verilog编写代码实现VGA的驱动和显示，并且提供了测试程序Testbench通过测试能得到正确的时序波形。-the source code for driving VGA and displaying the images,the testbench was offered.
xp2demo
- lattice xp2 系列开发板带源码，有需要的可依进行设计参考！-lattice xp2 Series development board with source code, need-based reference design!
eth_txethmac
- It is a ieee 802.3 transmitter module-It is a ieee 802.3 transmitter module
viterbi_decode
- 本程序为V_log代码，实现维特比译码，卷积码为（2，1，3）-viterbi_decode (2,1,3)
tcm_code
- tcm 编码 代码是V_LOG从工程中直接烤的 可以直接编译使用-tcm code V_LOG CODE
barker
- 帧同步的实现方法，基于7位巴克码的实现，采用V_LOG编写成的工程例子 可以直接编译-Frame Synchronization Method, 7 based on the realization of Barker Code, adopted the project into V_LOG example of the preparation can be directly compiled
UartvhdlSilmlate
- Universal Asynchronous Receiver
irda.tar
- depends on irda transmitter recever
FPGA
- FPGA编程课程演示PPT，包括语法入门，语法进阶和实例分析。-FPGA programming course presentation PPT, including Grammar, syntax and examples of advanced analysis.
103244864FIR_filter_DA_machine
- 简易fir滤波器，采用分布式算法实现，verilog-Simple fir filter using distributed algorithm, verilog
firfilter14
- 用Quartus II实现综合布线，要求充分利用Altera Stratix/Stratix II的器件的DSPBLOCK资源，Quartus II综合出的系统最高工作频率达到270Mhz以上.用Verilog进行编程。-Pipeline FIR structure。
Transmitter
- 这里上传的资料是：基于FPGA的OFDM系统开发的发送程序，涵盖了OFDM系统所有的技术点，是基于vreilog开发的。-From here the information is: FPGA-based OFDM system development send program covers all the technical point of OFDM system is based on vreilog development.
8051_FTEST_K4X4(NO.1)
- 8051_FTEST_K4X4 带按键的4x4的 等精度频率计！-8051_FTEST_K4X4 with key 4x4 and other precision frequency counter!
viterbi_decoder_programs
- viterbi decoder programs
mux_case
- 用case 语句描述的4 选1 MUX源代码程序实现-case4（1） ，VHDL&verilog
block2
- 阻塞赋值方式，描述的移位寄存器2verilogHDL源代码实现-Block verilogHDL
account
- 电话计费器程序的VerilogHDL源代码实现-cellphone account ，verilogHDL