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VGA显示汉字VHDL程序
- 使用vhdl语言编写的，通过vga在屏幕上显示汉字(Using VHDL language, through the VGA display Chinese characters on the screen)
用vhdl写实用96例子
- 用vhdl写实用96例子, 有RAM，PID 等(Using VHDL to write practical examples of 96, there are RAM, PID and so on)
CIC VHDL language
- 台湾国家芯片系统中心专用教程，陈献文著作(taiwan CIC advanced VHDL course)
VHDL Programming By Example doughlas perry
- VHDL PROGRAMMING BY EXAMPLE. Douglas L. Perry
VHDL-Handbook
- VHDL lexical elements, literals, reserved words, syntax and others
基于VHDL的UART控制器设计
- UART模块的VHDL语言设计(Design of VHDL language based on UART module)
用VHDL设计移位寄存器
- 实现序列检测，让你通过VHDL语言实现序列数字的发生(Sequence detector code)
VHDL程序
- 利用QuartusⅡ6.0对所设计的出租车计费器的VHDL代码进行仿真，并在FPGA数字实验系统上实现了该控制。(The Quartus II 6 is used to simulate the VHDL code of the designed taxi billing device, and the control is realized on the FPGA digital experiment system.)
VHDL语言入门教程
- this book introduce the use of VHDL.
VHDL语言100例详解
- VHDL language 100 examples
VHDL-和-Verilog-HDL-的区别
- The difference between VHDL and Verilog HDL.
VHDL (2)
- 数码管显示很好用的VHDL语言很实用下载试试(Digital tube display)
VHDL方波
- 在Quartus II 中，利用VHDL 语言产生方波，程序如下(The VHDL language produces Fang Bo)
vhdl
- 应用vhdl在实验箱上实现键盘扫描带有去抖并且移位(To realize the keyboard scan to shake and shift)
vhdl分频器设计
- vhdl分频器设计，用quartus软件偏写，可进行时钟的分频。(Design of VHDL frequency divider)
vhdl译码显示器设计
- vhdl译码显示器设计，用quartus2软件编写，可实现数码管的显示译码功能。(VHDL decipher display design, written in quartus2 software, can realize the display and decoding function of the digital tube.)
VHDL实验全部内容及工程文件
- vhdl基础范例材料,适合刚刚学习这门语言的新生，实验课考试用。(Basic sample material of vhdl.It is suitable for freshmen who have just learned the language.)
VHDL实用教程_潘松_王国栋
- vhdl经典教程，本人亲自学习实践，很有用。带你进入fpga世界。(VHDL classic tutorials, I personally learn practice, very useful. Take you into the FPGA world.)
NandFlash VHDL程序
- VHDL编写的用于FPGA的NandFlash程序，包括ECC校验和时钟等，希望可以帮助到大家
VHDL-FIR-filters
- ynthesizable FIR filters in VHDL with a focus on optimal mapping to Xilinx DSP slices. This repository contains a transposed direct form, systolic form for single-rate FIR filters and a custom parallel polyphase FIR decimating filter. The VHDL has be