资源列表
report1
- 旋钮编码器设计，可实现输出稳定并且具有防抖功能-Rotary encoders designed to achieve stable output and has anti-shake function
eetop.cn_quartus_ii_11.0_sp1_patched_sys_cpt_dll.
- dll for quartus ii 11.0 windows
niostouch
- 一个触摸屏的实例化程序,里面有各种读写触摸函数,都是自己写的,还有铁片存储器以及i2c总线的应用-Instances of a touchscreen application, there are various touch functions to read and write, write all their own, as well as iron memory and i2c bus applications
STCFFTnew
- 用C51通过傅李叶运算在液晶屏上显示音乐频谱，采样是4.47K-Fu Lee leaves with C51 through operations on the LCD display musical spectrum, the sampling is 4.47K
div_verilog
- 基于二进制移位用verilog实现除法的两种方法-Shift based on the binary division with verilog two methods to achieve
8-p-fft
- 基于FPGA和CORDIC算法的8点FFT-8-point FFT based on FPGA and CORDIC
LogicLock
- 通过Quartus软件自带的工程实例——“lockmult”来熟悉Altera Quartus II逻辑锁定功能LogicLock的使用方法。-Comes through the Quartus software engineering examples- " lockmult" to become familiar with Altera Quartus II logic lock LogicLock to use.
DDR2-verilog
- Verilog程序设计实例中，DDR部分的程序代码-Verilog programming example, DDR part of the program code
FPGA-Implementation-of-a-Best-precision-Fixed-poi
- FPGA Implementation of a Best-precision Fixed-point Digital PID Controller
vhdl-ad9910
- ad9910 DDS板 VHDL源代码，在Cyclone II FPGA上调试通过，主要文件说明： Filename Function ----------------------------------------------------- dds_controller.vhd top entity, opcode decoding ddslib.vhd configuration,opcode definition dds_serial.vhd parallel to s
ppt4aix4sopc
- 基于AXI4的sopc开发讲义,2011年电子大赛的辅导材料-powerpoint for aix4 sopc development
sunday_clock
- 数字钟 VHDL 年月日 时分秒 东北大学 EDA vhdl例程 电子设计自动化-VHDL date when the digital clock every minute routine Northeastern University Electronic Design Automation EDA vhdl