资源列表
03_key_detect_1
- FPGA开发板按键历程，芯片型号是 EP4CE6F17C8N(FPGA development board key process, the chip model is EP4CE6F17C8N)
04_key_detect_2
- 第二个FPGA开发板按键工程，芯片型号是 EP4CE6F17C8N(FPGA development board key process, the chip model is EP4CE6F17C8N)
09_vga
- FPGAvga的使用完整工程例子，芯片型号是 EP4CE6F17C8N(FPGAvga's use example, the chip model is EP4CE6F17C8N)
frequency
- 用于FPGA开发，使用VERILOG语言编写，并在QUARTUS II仿真平台仿真，实现频率计的功能。(It is used in FPGA development, written in VERILOG language, and simulated on the QUARTUS II simulation platform to realize the function of the frequency meter.)
HDB3
- 按照要求对“数字基带信号HDB3译码器设计与建模”进行逻辑分析，了解HDB3译码器译码原理，了解各模块电路的逻辑功能，设计通信系统框图，画出实现电路原理图，编写VHDL语言程序，上机调试、仿真，记录实验结果波形，对实验结果进行分析。(In accordance with the requirements of the logical analysis of the design and modeling of the digital baseband signal HDB3 decoder, H
VGA显示8色彩条和方格
- VGA驱动，基于verilog语言，平台EPC4(sdfdsssadadadsadadasdadad)
5L_SVPWM_ANPC_CPLD
- 基于CPLD硬件描述语言编写的五电平SVPWM脉冲触发程序(Five level SVPWM pulse trigger program based on CPLD hardware descr iption language)
multi_booth
- booth乘法器,实现普通booth乘法算法(Booth multiplier to implement the common Booth multiplication algorithm)
二进制码转化为ＢＣＤ码源程序
- 二进制码转化为ＢＣＤ码源程序,VHDL在FPGA验证(Conversion of binary code into BCD code source program)
ＢＣＤ码转化为七段码源程序
- ＢＣＤ码转化为七段码源程序。VHDL在FPGA验证(Conversion of BCD code into seven segment code source program)
I2CHDL
- IIc时序逻辑的VHDL源代码，便于时序的调试(VHDL source code of IIc time series logic, easy to debug time series)
MaxplusII_Altera
- MaxplusII_Altera片上编程的使用说明(Instructions for programming on MaxplusII_Alter)