资源列表
ads822
- 自己用Verilog语言写的ADS822芯片的驱动，亲测可用。其他并行ADC芯片也可以用。-Verilog language used to write their own drivers ADS822 chips, pro-test available. Other parallel ADC chips can also be used.
dual_ram
- 在ISE中测试双端口RAM的源码，结合DDS可以通过Isim仿真直接测试RAM IP核的使用是否正常。-Dual-port RAM test source code in ISE, the binding DDS RAM IP core can be directly tested whether the use of the normal simulation.
camera_bfm
- ov7670摄像头功能总线模型的源代码和源代码仿真-ov7670 camera function bus model source code and source code emulation
crc32
- 该文件主要描述的是crc算法的实现，是8bit输入，输出的是32bit的crc校验码-The document is to achieve crc algorithm described is 8bit input, the output is a 32bit crc checksum
FPGAforlcdDisplay
- FPGA ship FOR LCD display, the LCD is 12864.有兴趣的初学者可以看看，高手绕过。-FPGA ship FOR LCD display, the LCD is 12864 MODEL.
Quadrotor_control
- 基于xilinx FPGA的四旋翼简单控制系统ISE14.1工程文件。于spartan-6上验证成功。-Quadrotor control system based on Xilinx FPGA.
conv
- 16位的卷积器 直接套用公式编写，执行正确-conv
DAC
- DACADC资料，10bit300MSsDAC6V输出摆动； 10bit500MSPS分段DAC性能优化；用DAC产生Nyquist-WDM信号等-DACADC information, 10bit300MSsDAC6V output swing 10bit500MSPS segmented DAC performance optimization produced by DAC Nyquist-WDM signals
Test_96_Right2
- MCU配合FPGA控制驱动96路电机,其中MCU与FPGA间用SPI通信，本文件为FPGA部分verilog源程序-MCU with FPGA control and drive motors ，where MCU communicate with FPGA using SPI
p3structural
- To Design 1-bit Full Adder using Verilog HDL for all logic gates with switch and gate level modelling.
mb
- xilinx公司Microblaze核源文件，版本v7_10_a，语言VHDL，用于FPGA开发和DC综合-xilinx company Microblaze nuclear source file, version v7_10_a, language VHDL, and FPGA development for integrated DC
PCI_top
- 这是PCI运动控制卡的核心代码，我的一个项目程序，很好用，verilog 语言编写。-This is a PCI motion control card core code, I have a project program, easy to use, verilog language.