资源列表
stopwatch
- A stopwatch circuit that counts minutes and seconds, and has reset, pause functionalities. Designed using Verilog.
FlappyFPGA-master
- Recreation of the game Flappy Bird, with an emphasis on replicating the physics component of the gameplay.
FPGA-Connect4-master
- Source code for an example VGA controller
verilog_projects-master
- Multiple useful Verilog examples including a VGA controller
verilog-tetris-master
- An implementation of the Tetris game using Verilog and a Spartan fgpa board
Boundary-Scan-Architecture
- 边界扫描技术相关资料，官方说明，含各个模块的介绍。很有参考价值。-Boundary-Scan Architecture
JTAG
- 边界扫描技术相关资料，含各个模块的介绍。很有参考价值。-JTAG TAG CONTROLLER
1
- 基于USB接口的边界扫描测试控制器设计,很实用，值得参考。-jtag tap controller
VGA
- 基于FPGA的VGA动态显示设计，采用Verilog语言，只要实现VGA动态地显示图片，还有花纹，棋盘，以及按键控制音乐的声响等等。。。。有需要的就下来看看吧。-FPGA-based VGA display dynamic design, using Verilog language, as long as the VGA achieve dynamic display pictures, as well as patterns, board, and a key to control musi
bishe_VGA
- 基于FPGA的VGA动态显示，有花纹，棋盘，以及图像的显示。还有音乐的播放。采用verilog语言-FPGA-based VGA display dynamic, with patterns, checkerboard, and the image is displayed. And music playback. Using verilog language
clkdivverilog
- 使用verilog 计数50次 实现50分频，以此类推，分频器-clkdiv using verilog，
dds
- 直接数字频率合成法产生正弦波，方波，锯齿波，三角波等基本波形。-Generate sine wave, direct digital frequency synthesis method of square wave, sawtooth wave, triangle wave and other basic waveform.