资源列表
DDS_sinwave
- 基于FPGA对DDS芯片的仿真。能产生10M以上正弦波。并且波形不失真。-Simulation of DDS chip based on FPGA. Can produce more than 10M sine wave. And the waveform is not distorted.
FPGA_PWM
- 通过FPGA产生PWM波，实现频率与占空比均可调，移植方便快捷。-Produced by the FPGA PWM wave frequency and duty cycle can be adjusted to achieve convenient transplant.
mdio_slave_interface
- Management Data Input/Output Interfaces, or MDIO, are specified in the IEEE 802.3 standard. Their primary application is to provide a Serial Management Interface (SMI) to transfer management data between an Ethernet Media Access Controller (MAC)
hdb3
- 使用FPGA将伪随机码转换成DHB3吗，及解码HDB3码-encode and decode hdb3 using verilog HDL
sin_quartus9.0
- 用Verilog实现不同相位的正弦波波形输出，使用到ROM查表方式，对不同相位的地址进行合成后查表得到不同相位的正弦波。-Implementation of Sine wave output with different phase.
code
- 把MII接口接收的4比特并行数据转换为8比特的并行数据输出。-convert 4 bit data to 8 bit data
code
- A、B两串行数据转换为并行数据，然后进入加法器模块，进行相加输出。-A, B two serial data is converted to parallel data, and then enter the adder module, add the output.
code
- 7位表决器，实现投票选择结果呈现； 减法器编码。-7 bit voting machine, realize the voting choice results present the encoding.
code
- 动态扫描键盘，然后把按键结果显示在LCD上，相关使用去抖功能-Dynamic scan keyboard, and then the key results are displayed on the LCD, the use of the shake function
code
- 经典电路设计（华为） 以及设计电路约束文件（华为）-Classical circuit design (HUAWEI) and the design of the circuit constraint file (HUAWEI)
ADS8509
- FPGA驱动高输入电压范围的ADS8509芯片，采样范围广，适合前端大信号处理-FPGA drive a high input voltage range ADS8509 chip, sampling a wide range, suitable for large front-end signal processing
DAC902_model
- 用verilog写的12位并口DAC902 模块。可在FPGA上运行-Written in verilog 12 parallel DAC902 module.Can be run on the FPGA